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| author | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
| commit | ebe69fe11e48d322045d5949c83283927a0d790b (patch) | |
| tree | c92f1907a6b8006628a4b01615f38264d29834ea /test/CodeGen/PowerPC/fp-to-int-to-fp.ll | |
| parent | b7d2e72b02a4cb8034f32f8247a2558d2434e121 (diff) | |
| download | external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.zip external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.gz external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.bz2 | |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
Diffstat (limited to 'test/CodeGen/PowerPC/fp-to-int-to-fp.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/fp-to-int-to-fp.ll | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/fp-to-int-to-fp.ll b/test/CodeGen/PowerPC/fp-to-int-to-fp.ll new file mode 100644 index 0000000..f56b9b3 --- /dev/null +++ b/test/CodeGen/PowerPC/fp-to-int-to-fp.ll @@ -0,0 +1,70 @@ +; RUN: llc -mcpu=a2 < %s | FileCheck %s -check-prefix=FPCVT +; RUN: llc -mcpu=ppc64 < %s | FileCheck %s -check-prefix=PPC64 +target datalayout = "E-m:e-i64:64-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +; Function Attrs: nounwind readnone +define float @fool(float %X) #0 { +entry: + %conv = fptosi float %X to i64 + %conv1 = sitofp i64 %conv to float + ret float %conv1 + +; FPCVT-LABEL: @fool +; FPCVT: fctidz [[REG1:[0-9]+]], 1 +; FPCVT: fcfids 1, [[REG1]] +; FPCVT: blr + +; PPC64-LABEL: @fool +; PPC64: fctidz [[REG1:[0-9]+]], 1 +; PPC64: fcfid [[REG2:[0-9]+]], [[REG1]] +; PPC64: frsp 1, [[REG2]] +; PPC64: blr +} + +; Function Attrs: nounwind readnone +define double @foodl(double %X) #0 { +entry: + %conv = fptosi double %X to i64 + %conv1 = sitofp i64 %conv to double + ret double %conv1 + +; FPCVT-LABEL: @foodl +; FPCVT: fctidz [[REG1:[0-9]+]], 1 +; FPCVT: fcfid 1, [[REG1]] +; FPCVT: blr + +; PPC64-LABEL: @foodl +; PPC64: fctidz [[REG1:[0-9]+]], 1 +; PPC64: fcfid 1, [[REG1]] +; PPC64: blr +} + +; Function Attrs: nounwind readnone +define float @fooul(float %X) #0 { +entry: + %conv = fptoui float %X to i64 + %conv1 = uitofp i64 %conv to float + ret float %conv1 + +; FPCVT-LABEL: @fooul +; FPCVT: fctiduz [[REG1:[0-9]+]], 1 +; FPCVT: fcfidus 1, [[REG1]] +; FPCVT: blr +} + +; Function Attrs: nounwind readnone +define double @fooudl(double %X) #0 { +entry: + %conv = fptoui double %X to i64 + %conv1 = uitofp i64 %conv to double + ret double %conv1 + +; FPCVT-LABEL: @fooudl +; FPCVT: fctiduz [[REG1:[0-9]+]], 1 +; FPCVT: fcfidu 1, [[REG1]] +; FPCVT: blr +} + +attributes #0 = { nounwind readnone } + |