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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 21:22:52 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-10 21:23:04 +0000 |
| commit | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/PowerPC/inlineasm-i64-reg.ll | |
| parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
| parent | 4c5e43da7792f75567b693105cc53e3f1992ad98 (diff) | |
| download | external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.zip external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.gz external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.bz2 | |
Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/CodeGen/PowerPC/inlineasm-i64-reg.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/inlineasm-i64-reg.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/test/CodeGen/PowerPC/inlineasm-i64-reg.ll b/test/CodeGen/PowerPC/inlineasm-i64-reg.ll index 4d8e704..05f2a19 100644 --- a/test/CodeGen/PowerPC/inlineasm-i64-reg.ll +++ b/test/CodeGen/PowerPC/inlineasm-i64-reg.ll @@ -19,18 +19,18 @@ entry: store %struct.BG_CoordinateMapping_t* %map, %struct.BG_CoordinateMapping_t** %map.addr, align 8 store i64* %numentries, i64** %numentries.addr, align 8 store i64 1055, i64* %r0, align 8 - %0 = load i64* %mapsize.addr, align 8 + %0 = load i64, i64* %mapsize.addr, align 8 store i64 %0, i64* %r3, align 8 - %1 = load %struct.BG_CoordinateMapping_t** %map.addr, align 8 + %1 = load %struct.BG_CoordinateMapping_t*, %struct.BG_CoordinateMapping_t** %map.addr, align 8 %2 = ptrtoint %struct.BG_CoordinateMapping_t* %1 to i64 store i64 %2, i64* %r4, align 8 - %3 = load i64** %numentries.addr, align 8 + %3 = load i64*, i64** %numentries.addr, align 8 %4 = ptrtoint i64* %3 to i64 store i64 %4, i64* %r5, align 8 - %5 = load i64* %r0, align 8 - %6 = load i64* %r3, align 8 - %7 = load i64* %r4, align 8 - %8 = load i64* %r5, align 8 + %5 = load i64, i64* %r0, align 8 + %6 = load i64, i64* %r3, align 8 + %7 = load i64, i64* %r4, align 8 + %8 = load i64, i64* %r5, align 8 %9 = call { i64, i64, i64, i64 } asm sideeffect "sc", "={r0},={r3},={r4},={r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 %5, i64 %6, i64 %7, i64 %8) #1, !srcloc !0 ; CHECK-LABEL: @Kernel_RanksToCoords @@ -52,9 +52,9 @@ entry: store i64 %asmresult1, i64* %r3, align 8 store i64 %asmresult2, i64* %r4, align 8 store i64 %asmresult3, i64* %r5, align 8 - %10 = load i64* %r3, align 8 + %10 = load i64, i64* %r3, align 8 store i64 %10, i64* %tmp - %11 = load i64* %tmp + %11 = load i64, i64* %tmp %conv = trunc i64 %11 to i32 ret i32 %conv } @@ -87,7 +87,7 @@ entry: if.then: ; preds = %entry call void @mtrace() - %.pre = load i32* %argc.addr, align 4 + %.pre = load i32, i32* %argc.addr, align 4 br label %if.end if.end: ; preds = %if.then, %entry |