diff options
| author | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
| commit | ae3a0be92e33bc716722aa600983fc1535acb122 (patch) | |
| tree | 768333097a76cc105813c7c636daf6259e6a0fc7 /test/CodeGen/PowerPC/int-fp-conv-1.ll | |
| parent | d18e31ae17390d9c6f6cf93d18badf962452031d (diff) | |
| download | external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.zip external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.gz external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.bz2 | |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/int-fp-conv-1.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/int-fp-conv-1.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/int-fp-conv-1.ll b/test/CodeGen/PowerPC/int-fp-conv-1.ll index 3d66675..583408c 100644 --- a/test/CodeGen/PowerPC/int-fp-conv-1.ll +++ b/test/CodeGen/PowerPC/int-fp-conv-1.ll @@ -3,7 +3,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind { entry: %tmp1213 = uitofp i64 0 to ppc_fp128 ; <ppc_fp128> [#uses=1] - %tmp15 = sub ppc_fp128 %a, %tmp1213 ; <ppc_fp128> [#uses=1] + %tmp15 = fsub ppc_fp128 %a, %tmp1213 ; <ppc_fp128> [#uses=1] %tmp2829 = fptoui ppc_fp128 %tmp15 to i32 ; <i32> [#uses=1] %tmp282930 = zext i32 %tmp2829 to i64 ; <i64> [#uses=1] %tmp32 = add i64 %tmp282930, 0 ; <i64> [#uses=1] |