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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/PowerPC/ppc64-byval-align.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/PowerPC/ppc64-byval-align.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/ppc64-byval-align.ll | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/test/CodeGen/PowerPC/ppc64-byval-align.ll b/test/CodeGen/PowerPC/ppc64-byval-align.ll index 0e73cf2..7170f59 100644 --- a/test/CodeGen/PowerPC/ppc64-byval-align.ll +++ b/test/CodeGen/PowerPC/ppc64-byval-align.ll @@ -30,8 +30,8 @@ entry: define i64 @callee2(%struct.pad* byval nocapture readnone %x, i32 signext %y, %struct.test* byval align 16 nocapture readonly %z) { entry: - %x1 = getelementptr inbounds %struct.test* %z, i64 0, i32 0 - %0 = load i64* %x1, align 16 + %x1 = getelementptr inbounds %struct.test, %struct.test* %z, i64 0, i32 0 + %0 = load i64, i64* %x1, align 16 ret i64 %0 } ; CHECK-LABEL: @callee2 @@ -43,14 +43,16 @@ declare i64 @test2(%struct.pad* byval, i32 signext, %struct.test* byval align 16 define void @caller2(i64 %z) { entry: %tmp = alloca %struct.test, align 16 - %.compoundliteral.sroa.0.0..sroa_idx = getelementptr inbounds %struct.test* %tmp, i64 0, i32 0 + %.compoundliteral.sroa.0.0..sroa_idx = getelementptr inbounds %struct.test, %struct.test* %tmp, i64 0, i32 0 store i64 %z, i64* %.compoundliteral.sroa.0.0..sroa_idx, align 16 %call = call i64 @test2(%struct.pad* byval @gp, i32 signext 0, %struct.test* byval align 16 %tmp) ret void } ; CHECK-LABEL: @caller2 ; CHECK: std 3, [[OFF:[0-9]+]](1) -; CHECK: ld [[REG:[0-9]+]], [[OFF]](1) -; CHECK: std [[REG]], 128(1) +; CHECK: addi [[REG1:[0-9]+]], 1, [[OFF]] +; CHECK: lxvw4x [[REG2:[0-9]+]], 0, [[REG1]] +; CHECK: li [[REG3:[0-9]+]], 128 +; CHECK: stxvw4x 0, 1, [[REG3]] ; CHECK: bl test2 |