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author | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
commit | ebe69fe11e48d322045d5949c83283927a0d790b (patch) | |
tree | c92f1907a6b8006628a4b01615f38264d29834ea /test/CodeGen/PowerPC/qpx-bv-sint.ll | |
parent | b7d2e72b02a4cb8034f32f8247a2558d2434e121 (diff) | |
download | external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.zip external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.gz external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.bz2 |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
Diffstat (limited to 'test/CodeGen/PowerPC/qpx-bv-sint.ll')
-rw-r--r-- | test/CodeGen/PowerPC/qpx-bv-sint.ll | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/qpx-bv-sint.ll b/test/CodeGen/PowerPC/qpx-bv-sint.ll new file mode 100644 index 0000000..0bc14ed --- /dev/null +++ b/test/CodeGen/PowerPC/qpx-bv-sint.ll @@ -0,0 +1,33 @@ +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-bgq-linux" +; RUN: llc < %s -march=ppc64 -mcpu=a2q | FileCheck %s + +define void @s452() nounwind { +entry: + br label %for.body4 + +for.body4: ; preds = %for.body4, %entry + %conv.4 = sitofp i32 undef to double + %conv.5 = sitofp i32 undef to double + %mul.4.v.i0.1 = insertelement <2 x double> undef, double %conv.4, i32 0 + %mul.4.v.i0.2 = insertelement <2 x double> %mul.4.v.i0.1, double %conv.5, i32 1 + %mul.4 = fmul <2 x double> %mul.4.v.i0.2, undef + %add7.4 = fadd <2 x double> undef, %mul.4 + store <2 x double> %add7.4, <2 x double>* undef, align 16 + br i1 undef, label %for.end, label %for.body4 + +for.end: ; preds = %for.body4 + unreachable +; CHECK-LABEL: @s452 +; CHECK: lfiwax [[REG1:[0-9]+]], +; CHECK: fcfid [[REG2:[0-9]+]], [[REG1]] +; FIXME: We could 'promote' this to a vector earlier and remove this splat. +; CHECK: qvesplati {{[0-9]+}}, [[REG2]], 0 +; CHECK: qvfmul +; CHECK: qvfadd +; CHECK: qvesplati {{[0-9]+}}, +; FIXME: We can use qvstfcdx here instead of two stores. +; CHECK: stfd +; CHECK: stfd +} + |