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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/PowerPC/qpx-split-vsetcc.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/PowerPC/qpx-split-vsetcc.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/qpx-split-vsetcc.ll | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/qpx-split-vsetcc.ll b/test/CodeGen/PowerPC/qpx-split-vsetcc.ll new file mode 100644 index 0000000..c8cef0f --- /dev/null +++ b/test/CodeGen/PowerPC/qpx-split-vsetcc.ll @@ -0,0 +1,40 @@ +; RUN: llc -mcpu=a2q < %s | FileCheck %s +target datalayout = "E-m:e-i64:64-n32:64" +target triple = "powerpc64-bgq-linux" + +; Function Attrs: nounwind +define void @gsl_sf_legendre_Pl_deriv_array() #0 { +entry: + br i1 undef, label %do.body.i, label %if.else.i + +do.body.i: ; preds = %entry + unreachable + +if.else.i: ; preds = %entry + br i1 undef, label %return, label %for.body46.lr.ph + +for.body46.lr.ph: ; preds = %if.else.i + br label %vector.body198 + +vector.body198: ; preds = %vector.body198, %for.body46.lr.ph + %0 = icmp ne <4 x i32> undef, zeroinitializer + %1 = select <4 x i1> %0, <4 x double> <double 5.000000e-01, double 5.000000e-01, double 5.000000e-01, double 5.000000e-01>, <4 x double> <double -5.000000e-01, double -5.000000e-01, double -5.000000e-01, double -5.000000e-01> + %2 = fmul <4 x double> undef, %1 + %3 = fmul <4 x double> undef, %2 + %4 = fmul <4 x double> %3, undef + store <4 x double> %4, <4 x double>* undef, align 8 + br label %vector.body198 + +; CHECK-LABEL: @gsl_sf_legendre_Pl_deriv_array +; CHECK: qvlfiwzx +; CHECK: qvfcfidu +; CHECK: qvfcmpeq +; CHECK: qvfsel +; CHECK: qvfmul + +return: ; preds = %if.else.i + ret void +} + +attributes #0 = { nounwind } + |