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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-08 08:55:49 -0700 |
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committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-09 15:04:38 -0700 |
commit | 4c5e43da7792f75567b693105cc53e3f1992ad98 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/PowerPC/reloc-align.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
download | external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.zip external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.gz external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.bz2 |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
Diffstat (limited to 'test/CodeGen/PowerPC/reloc-align.ll')
-rw-r--r-- | test/CodeGen/PowerPC/reloc-align.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/reloc-align.ll b/test/CodeGen/PowerPC/reloc-align.ll index 13d6ada..754997b 100644 --- a/test/CodeGen/PowerPC/reloc-align.ll +++ b/test/CodeGen/PowerPC/reloc-align.ll @@ -24,7 +24,7 @@ entry: define internal fastcc signext i32 @func_90(%struct.S1* byval nocapture %p_91) #0 { entry: %0 = bitcast %struct.S1* %p_91 to i64* - %bf.load = load i64* %0, align 1 + %bf.load = load i64, i64* %0, align 1 %bf.shl = shl i64 %bf.load, 26 %bf.ashr = ashr i64 %bf.shl, 54 %bf.cast = trunc i64 %bf.ashr to i32 |