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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/PowerPC/subreg-postra.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/PowerPC/subreg-postra.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/subreg-postra.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/PowerPC/subreg-postra.ll b/test/CodeGen/PowerPC/subreg-postra.ll index b10fa66..fa5fd7e 100644 --- a/test/CodeGen/PowerPC/subreg-postra.ll +++ b/test/CodeGen/PowerPC/subreg-postra.ll @@ -120,8 +120,8 @@ while.body392.lr.ph: ; preds = %do.body378 br label %while.body392 while.body392: ; preds = %wait_on_buffer.exit1319, %while.body392.lr.ph - %0 = load i8** undef, align 8 - %add.ptr399 = getelementptr inbounds i8* %0, i64 -72 + %0 = load i8*, i8** undef, align 8 + %add.ptr399 = getelementptr inbounds i8, i8* %0, i64 -72 %b_state.i.i1314 = bitcast i8* %add.ptr399 to i64* %tobool.i1316 = icmp eq i64 undef, 0 br i1 %tobool.i1316, label %wait_on_buffer.exit1319, label %if.then.i1317 @@ -130,13 +130,13 @@ if.then.i1317: ; preds = %while.body392 unreachable wait_on_buffer.exit1319: ; preds = %while.body392 - %1 = load volatile i64* %b_state.i.i1314, align 8 + %1 = load volatile i64, i64* %b_state.i.i1314, align 8 %conv.i.i1322 = and i64 %1, 1 %lnot404 = icmp eq i64 %conv.i.i1322, 0 %.err.4 = select i1 %lnot404, i32 -5, i32 undef %2 = call i64 asm sideeffect "1:.long 0x7c0000a8 $| ((($0) & 0x1f) << 21) $| (((0) & 0x1f) << 16) $| ((($3) & 0x1f) << 11) $| (((0) & 0x1) << 0) \0Aandc $0,$0,$2\0Astdcx. $0,0,$3\0Abne- 1b\0A", "=&r,=*m,r,r,*m,~{cc},~{memory}"(i64* %b_state.i.i1314, i64 262144, i64* %b_state.i.i1314, i64* %b_state.i.i1314) #1 - %prev.i.i.i1325 = getelementptr inbounds i8* %0, i64 8 - %3 = load i32** null, align 8 + %prev.i.i.i1325 = getelementptr inbounds i8, i8* %0, i64 8 + %3 = load i32*, i32** null, align 8 store i32* %3, i32** undef, align 8 call void @__brelse(i32* undef) #1 br i1 undef, label %while.end418, label %while.body392 |