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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/PowerPC/tls-pic.ll | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/PowerPC/tls-pic.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/tls-pic.ll | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/tls-pic.ll b/test/CodeGen/PowerPC/tls-pic.ll index 9f3ab6e..9ba3725 100644 --- a/test/CodeGen/PowerPC/tls-pic.ll +++ b/test/CodeGen/PowerPC/tls-pic.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=ppc64 -mcpu=pwr7 -O0 -relocation-model=pic < %s | FileCheck -check-prefix=OPT0 %s ; RUN: llc -march=ppc64 -mcpu=pwr7 -O1 -relocation-model=pic < %s | FileCheck -check-prefix=OPT1 %s +; RUN: llc -march=ppc32 -O0 -relocation-model=pic < %s | FileCheck -check-prefix=OPT0-32 %s +; RUN: llc -march=ppc32 -O1 -relocation-model=pic < %s | FileCheck -check-prefix=OPT1-32 %s target triple = "powerpc64-unknown-linux-gnu" ; Test correct assembly code generation for thread-local storage using @@ -22,6 +24,16 @@ entry: ; OPT0-NEXT: nop ; OPT0: addis [[REG2:[0-9]+]], 3, a@dtprel@ha ; OPT0-NEXT: addi {{[0-9]+}}, [[REG2]], a@dtprel@l +; OPT0-32-LABEL: main +; OPT0-32: addi {{[0-9]+}}, {{[0-9]+}}, a@got@tlsld +; OPT0-32: bl __tls_get_addr(a@tlsld)@PLT +; OPT0-32: addis [[REG:[0-9]+]], 3, a@dtprel@ha +; OPT0-32-NEXT: addi {{[0-9]+}}, [[REG]], a@dtprel@l +; OPT1-32-LABEL: main +; OPT1-32: addi 3, {{[0-9]+}}, a@got@tlsld +; OPT1-32: bl __tls_get_addr(a@tlsld)@PLT +; OPT1-32: addis [[REG:[0-9]+]], 3, a@dtprel@ha +; OPT1-32-NEXT: addi {{[0-9]+}}, [[REG]], a@dtprel@l ; Test peephole optimization for thread-local storage using the ; local dynamic model. @@ -52,4 +64,6 @@ entry: ; OPT1-NEXT: addi 3, [[REG]], a2@got@tlsgd@l ; OPT1: bl __tls_get_addr(a2@tlsgd) ; OPT1-NEXT: nop - +; OPT1-32-LABEL: main2 +; OPT1-32: addi 3, {{[0-9]+}}, a2@got@tlsgd +; OPT1-32: bl __tls_get_addr(a2@tlsgd)@PLT |