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author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2012-10-29 21:18:16 +0000 |
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committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2012-10-29 21:18:16 +0000 |
commit | e6c56433de56fb89f1d476332134b6b2e22cfa28 (patch) | |
tree | 76c7a3b8e0642cfe144506d32720862e6eca0da2 /test/CodeGen/PowerPC/varargs-struct-float.ll | |
parent | 4830ccff925b8d57f589650a3ad6007ffa0536d5 (diff) | |
download | external_llvm-e6c56433de56fb89f1d476332134b6b2e22cfa28.zip external_llvm-e6c56433de56fb89f1d476332134b6b2e22cfa28.tar.gz external_llvm-e6c56433de56fb89f1d476332134b6b2e22cfa28.tar.bz2 |
This patch solves a problem with passing varargs parameters under the PPC64
ELF ABI.
A varargs parameter consisting of a single-precision floating-point value,
or of a single-element aggregate containing a single-precision floating-point
value, must be passed in the low-order (rightmost) four bytes of the
doubleword stack slot reserved for that parameter. If there are GPR protocol
registers remaining, the parameter must also be mirrored in the low-order
four bytes of the reserved GPR.
Prior to this patch, such parameters were being passed in the high-order
four bytes of the stack slot and the mirrored GPR.
The patch adds a new test case to verify the correct code generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166968 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/varargs-struct-float.ll')
-rw-r--r-- | test/CodeGen/PowerPC/varargs-struct-float.ll | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/varargs-struct-float.ll b/test/CodeGen/PowerPC/varargs-struct-float.ll new file mode 100644 index 0000000..fb1835f --- /dev/null +++ b/test/CodeGen/PowerPC/varargs-struct-float.ll @@ -0,0 +1,23 @@ +; RUN: llc -mcpu=pwr7 -O0 < %s | FileCheck %s + +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +%struct.Sf1 = type { float } + +define void @foo(float inreg %s.coerce) nounwind { +entry: + %s = alloca %struct.Sf1, align 4 + %coerce.dive = getelementptr %struct.Sf1* %s, i32 0, i32 0 + store float %s.coerce, float* %coerce.dive, align 1 + %coerce.dive1 = getelementptr %struct.Sf1* %s, i32 0, i32 0 + %0 = load float* %coerce.dive1, align 1 + call void (i32, ...)* @testvaSf1(i32 1, float inreg %0) + ret void +} + +; CHECK: stfs {{[0-9]+}}, 60(1) +; CHECK: ld 4, 56(1) +; CHECK: bl + +declare void @testvaSf1(i32, ...) |