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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 21:22:52 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-10 21:23:04 +0000 |
| commit | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/PowerPC/vec_conv.ll | |
| parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
| parent | 4c5e43da7792f75567b693105cc53e3f1992ad98 (diff) | |
| download | external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.zip external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.gz external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.bz2 | |
Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/CodeGen/PowerPC/vec_conv.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/vec_conv.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/PowerPC/vec_conv.ll b/test/CodeGen/PowerPC/vec_conv.ll index a39ae91..6e19f5a 100644 --- a/test/CodeGen/PowerPC/vec_conv.ll +++ b/test/CodeGen/PowerPC/vec_conv.ll @@ -11,7 +11,7 @@ target triple = "powerpc64-unknown-linux-gnu" define void @v4f32_to_v4i32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind { entry: - %0 = load <4 x float>* @cte_float, align 16 + %0 = load <4 x float>, <4 x float>* @cte_float, align 16 %mul = fmul <4 x float> %0, %x %1 = fptosi <4 x float> %mul to <4 x i32> store <4 x i32> %1, <4 x i32>* %y, align 16 @@ -23,7 +23,7 @@ entry: define void @v4f32_to_v4u32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind { entry: - %0 = load <4 x float>* @cte_float, align 16 + %0 = load <4 x float>, <4 x float>* @cte_float, align 16 %mul = fmul <4 x float> %0, %x %1 = fptoui <4 x float> %mul to <4 x i32> store <4 x i32> %1, <4 x i32>* %y, align 16 @@ -35,7 +35,7 @@ entry: define void @v4i32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind { entry: - %0 = load <4 x i32>* @cte_int, align 16 + %0 = load <4 x i32>, <4 x i32>* @cte_int, align 16 %mul = mul <4 x i32> %0, %x %1 = sitofp <4 x i32> %mul to <4 x float> store <4 x float> %1, <4 x float>* %y, align 16 @@ -47,7 +47,7 @@ entry: define void @v4u32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind { entry: - %0 = load <4 x i32>* @cte_int, align 16 + %0 = load <4 x i32>, <4 x i32>* @cte_int, align 16 %mul = mul <4 x i32> %0, %x %1 = uitofp <4 x i32> %mul to <4 x float> store <4 x float> %1, <4 x float>* %y, align 16 |