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authorStephen Hines <srhines@google.com>2014-12-01 14:51:49 -0800
committerStephen Hines <srhines@google.com>2014-12-02 16:08:10 -0800
commit37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch)
tree8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/PowerPC/vec_urem_const.ll
parentd2327b22152ced7bc46dc629fc908959e8a52d03 (diff)
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Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/PowerPC/vec_urem_const.ll')
-rw-r--r--test/CodeGen/PowerPC/vec_urem_const.ll13
1 files changed, 13 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/vec_urem_const.ll b/test/CodeGen/PowerPC/vec_urem_const.ll
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--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_urem_const.ll
@@ -0,0 +1,13 @@
+; RUN: llc -mcpu=pwr6 -mattr=+altivec < %s
+
+target datalayout = "e-m:e-i64:64-n32:64"
+target triple = "powerpc64le-unknown-linux-gnu"
+
+; Common code used to replace the urem by a mulhu, and compilation would
+; then crash since mulhu isn't supported on vector types.
+
+define <4 x i32> @test(<4 x i32> %x) {
+entry:
+ %0 = urem <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
+ ret <4 x i32> %0
+}