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author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
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committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/PowerPC/vsx.ll | |
parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/PowerPC/vsx.ll')
-rw-r--r-- | test/CodeGen/PowerPC/vsx.ll | 70 |
1 files changed, 69 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/vsx.ll b/test/CodeGen/PowerPC/vsx.ll index f5ac577..333b75a 100644 --- a/test/CodeGen/PowerPC/vsx.ll +++ b/test/CodeGen/PowerPC/vsx.ll @@ -356,6 +356,63 @@ define void @test31(<2 x i64>* %a, <2 x i64> %b) { ; CHECK: blr } +define <4 x float> @test32(<4 x float>* %a) { + %v = load <4 x float>* %a, align 16 + ret <4 x float> %v + +; CHECK-LABEL: @test32 +; CHECK: lxvw4x 34, 0, 3 +; CHECK: blr +} + +define void @test33(<4 x float>* %a, <4 x float> %b) { + store <4 x float> %b, <4 x float>* %a, align 16 + ret void + +; CHECK-LABEL: @test33 +; CHECK: stxvw4x 34, 0, 3 +; CHECK: blr +} + +define <4 x float> @test32u(<4 x float>* %a) { + %v = load <4 x float>* %a, align 8 + ret <4 x float> %v + +; CHECK-LABEL: @test32u +; CHECK-DAG: lvsl +; CHECK-DAG: lvx +; CHECK-DAG: lvx +; CHECK: vperm 2, +; CHECK: blr +} + +define void @test33u(<4 x float>* %a, <4 x float> %b) { + store <4 x float> %b, <4 x float>* %a, align 8 + ret void + +; CHECK-LABEL: @test33u +; CHECK: stxvw4x 34, 0, 3 +; CHECK: blr +} + +define <4 x i32> @test34(<4 x i32>* %a) { + %v = load <4 x i32>* %a, align 16 + ret <4 x i32> %v + +; CHECK-LABEL: @test34 +; CHECK: lxvw4x 34, 0, 3 +; CHECK: blr +} + +define void @test35(<4 x i32>* %a, <4 x i32> %b) { + store <4 x i32> %b, <4 x i32>* %a, align 16 + ret void + +; CHECK-LABEL: @test35 +; CHECK: stxvw4x 34, 0, 3 +; CHECK: blr +} + define <2 x double> @test40(<2 x i64> %a) { %v = uitofp <2 x i64> %a to <2 x double> ret <2 x double> %v @@ -634,7 +691,7 @@ define <2 x i32> @test80(i32 %v) { ; CHECK-DAG: addi [[R1:[0-9]+]], 3, 3 ; CHECK-DAG: addi [[R2:[0-9]+]], 1, -16 ; CHECK-DAG: addi [[R3:[0-9]+]], 3, 2 -; CHECK: std [[R1]], 8([[R2]]) +; CHECK: std [[R1]], -8(1) ; CHECK: std [[R3]], -16(1) ; CHECK: lxvd2x 34, 0, [[R2]] ; CHECK-NOT: stxvd2x @@ -649,3 +706,14 @@ define <2 x double> @test81(<4 x float> %b) { ; CHECK: blr } +define double @test82(double %a, double %b, double %c, double %d) { +entry: + %m = fcmp oeq double %c, %d + %v = select i1 %m, double %a, double %b + ret double %v + +; CHECK-LABEL: @test82 +; CHECK: xscmpudp [[REG:[0-9]+]], 3, 4 +; CHECK: beqlr [[REG]] +} + |