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author | Dan Gohman <gohman@apple.com> | 2009-08-25 15:38:29 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-08-25 15:38:29 +0000 |
commit | 2d65d35d9233277aee7c8a6d3643740e3ed29f0b (patch) | |
tree | d74811fd5c8366813b3931db99b3767c1eefeb7c /test/CodeGen/PowerPC | |
parent | 176426d2102142aaa0bf19aca55f528ceb873329 (diff) | |
download | external_llvm-2d65d35d9233277aee7c8a6d3643740e3ed29f0b.zip external_llvm-2d65d35d9233277aee7c8a6d3643740e3ed29f0b.tar.gz external_llvm-2d65d35d9233277aee7c8a6d3643740e3ed29f0b.tar.bz2 |
Remove obsolete -f flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79992 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC')
-rw-r--r-- | test/CodeGen/PowerPC/Frames-small.ll | 8 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/addc.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/and_add.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/mulhs.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/rlwimi2.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/rlwinm.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/rlwinm2.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/stfiwx.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/subc.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/vec_br_cmp.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/vec_splat.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/vec_vrsave.ll | 2 |
12 files changed, 16 insertions, 16 deletions
diff --git a/test/CodeGen/PowerPC/Frames-small.ll b/test/CodeGen/PowerPC/Frames-small.ll index 4ea3afb..c12dd44 100644 --- a/test/CodeGen/PowerPC/Frames-small.ll +++ b/test/CodeGen/PowerPC/Frames-small.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1 -f +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1 ; RUN not grep {stw r31, 20(r1)} %t1 ; RUN: grep {stwu r1, -16448(r1)} %t1 ; RUN: grep {addi r1, r1, 16448} %t1 @@ -7,20 +7,20 @@ ; RUN: not grep {lwz r31, 20(r1)} ; RUN: llvm-as < %s | \ ; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ -; RUN: -o %t2 -f +; RUN: -o %t2 ; RUN: grep {stw r31, 20(r1)} %t2 ; RUN: grep {stwu r1, -16448(r1)} %t2 ; RUN: grep {addi r1, r1, 16448} %t2 ; RUN: grep {lwz r31, 20(r1)} %t2 ; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3 -f +; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3 ; RUN: not grep {std r31, 40(r1)} %t3 ; RUN: grep {stdu r1, -16496(r1)} %t3 ; RUN: grep {addi r1, r1, 16496} %t3 ; RUN: not grep {ld r31, 40(r1)} %t3 ; RUN: llvm-as < %s | \ ; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ -; RUN: -o %t4 -f +; RUN: -o %t4 ; RUN: grep {std r31, 40(r1)} %t4 ; RUN: grep {stdu r1, -16496(r1)} %t4 ; RUN: grep {addi r1, r1, 16496} %t4 diff --git a/test/CodeGen/PowerPC/addc.ll b/test/CodeGen/PowerPC/addc.ll index 406053b..3e6fe27 100644 --- a/test/CodeGen/PowerPC/addc.ll +++ b/test/CodeGen/PowerPC/addc.ll @@ -1,5 +1,5 @@ ; All of these should be codegen'd without loading immediates -; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -o %t ; RUN: grep addc %t | count 1 ; RUN: grep adde %t | count 1 ; RUN: grep addze %t | count 1 diff --git a/test/CodeGen/PowerPC/and_add.ll b/test/CodeGen/PowerPC/and_add.ll index f103e7c..b034841 100644 --- a/test/CodeGen/PowerPC/and_add.ll +++ b/test/CodeGen/PowerPC/and_add.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -o %t ; RUN: grep slwi %t ; RUN: not grep addi %t ; RUN: not grep rlwinm %t diff --git a/test/CodeGen/PowerPC/mulhs.ll b/test/CodeGen/PowerPC/mulhs.ll index 3b0daad..e6e7b5c 100644 --- a/test/CodeGen/PowerPC/mulhs.ll +++ b/test/CodeGen/PowerPC/mulhs.ll @@ -1,5 +1,5 @@ ; All of these ands and shifts should be folded into rlwimi's -; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -o %t ; RUN: not grep mulhwu %t ; RUN: not grep srawi %t ; RUN: not grep add %t diff --git a/test/CodeGen/PowerPC/rlwimi2.ll b/test/CodeGen/PowerPC/rlwimi2.ll index 33eaacf..3cb2e7b 100644 --- a/test/CodeGen/PowerPC/rlwimi2.ll +++ b/test/CodeGen/PowerPC/rlwimi2.ll @@ -1,5 +1,5 @@ ; All of these ands and shifts should be folded into rlwimi's -; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -o %t ; RUN: grep rlwimi %t | count 3 ; RUN: grep srwi %t | count 1 ; RUN: not grep slwi %t diff --git a/test/CodeGen/PowerPC/rlwinm.ll b/test/CodeGen/PowerPC/rlwinm.ll index 9d34865..d92b77c 100644 --- a/test/CodeGen/PowerPC/rlwinm.ll +++ b/test/CodeGen/PowerPC/rlwinm.ll @@ -1,5 +1,5 @@ ; All of these ands and shifts should be folded into rlwimi's -; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -o %t ; RUN: not grep and %t ; RUN: not grep srawi %t ; RUN: not grep srwi %t diff --git a/test/CodeGen/PowerPC/rlwinm2.ll b/test/CodeGen/PowerPC/rlwinm2.ll index 06ceaa2..7ddea4e 100644 --- a/test/CodeGen/PowerPC/rlwinm2.ll +++ b/test/CodeGen/PowerPC/rlwinm2.ll @@ -1,5 +1,5 @@ ; All of these ands and shifts should be folded into rlw[i]nm instructions -; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -o %t ; RUN: not grep and %t ; RUN: not grep srawi %t ; RUN: not grep srwi %t diff --git a/test/CodeGen/PowerPC/stfiwx.ll b/test/CodeGen/PowerPC/stfiwx.ll index c4afb63..765c326 100644 --- a/test/CodeGen/PowerPC/stfiwx.ll +++ b/test/CodeGen/PowerPC/stfiwx.ll @@ -1,10 +1,10 @@ ; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=stfiwx -o %t1 -f +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=stfiwx -o %t1 ; RUN: grep stfiwx %t1 ; RUN: not grep r1 %t1 ; RUN: llvm-as < %s | \ ; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-stfiwx \ -; RUN: -o %t2 -f +; RUN: -o %t2 ; RUN: not grep stfiwx %t2 ; RUN: grep r1 %t2 diff --git a/test/CodeGen/PowerPC/subc.ll b/test/CodeGen/PowerPC/subc.ll index 4ac9596..1722074 100644 --- a/test/CodeGen/PowerPC/subc.ll +++ b/test/CodeGen/PowerPC/subc.ll @@ -1,5 +1,5 @@ ; All of these should be codegen'd without loading immediates -; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -o %t ; RUN: grep subfc %t | count 1 ; RUN: grep subfe %t | count 1 ; RUN: grep subfze %t | count 1 diff --git a/test/CodeGen/PowerPC/vec_br_cmp.ll b/test/CodeGen/PowerPC/vec_br_cmp.ll index 6d79967..8cbab5c 100644 --- a/test/CodeGen/PowerPC/vec_br_cmp.ll +++ b/test/CodeGen/PowerPC/vec_br_cmp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t ; RUN: grep vcmpeqfp. %t ; RUN: not grep mfcr %t diff --git a/test/CodeGen/PowerPC/vec_splat.ll b/test/CodeGen/PowerPC/vec_splat.ll index 7b7e4fe..7f466bf 100644 --- a/test/CodeGen/PowerPC/vec_splat.ll +++ b/test/CodeGen/PowerPC/vec_splat.ll @@ -1,7 +1,7 @@ ; Test that vectors are scalarized/lowered correctly. ; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g3 | \ ; RUN: grep stfs | count 4 -; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t ; RUN: grep vspltw %t | count 2 ; RUN: grep vsplti %t | count 3 ; RUN: grep vsplth %t | count 1 diff --git a/test/CodeGen/PowerPC/vec_vrsave.ll b/test/CodeGen/PowerPC/vec_vrsave.ll index 06769f6..7d5fadb 100644 --- a/test/CodeGen/PowerPC/vec_vrsave.ll +++ b/test/CodeGen/PowerPC/vec_vrsave.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t -f +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t ; RUN: grep vrlw %t ; RUN: not grep spr %t ; RUN: not grep vrsave %t |