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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2013-09-17 20:03:25 +0000 |
|---|---|---|
| committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2013-09-17 20:03:25 +0000 |
| commit | 5bd1dfa2b5deab10a1a7a5a4ba117c28d878595d (patch) | |
| tree | c313e49febb06d1386268c994f38b7284c782e57 /test/CodeGen/PowerPC | |
| parent | 65457b679ae240c1a37da82c5484dac478c47b6d (diff) | |
| download | external_llvm-5bd1dfa2b5deab10a1a7a5a4ba117c28d878595d.zip external_llvm-5bd1dfa2b5deab10a1a7a5a4ba117c28d878595d.tar.gz external_llvm-5bd1dfa2b5deab10a1a7a5a4ba117c28d878595d.tar.bz2 | |
[PowerPC] Fix problems with large code model (PR17169).
Large code model on PPC64 requires creating and referencing TOC entries when
using the addis/ld form of addressing. This was not being done in all cases.
The changes in this patch to PPCAsmPrinter::EmitInstruction() fix this. Two
test cases are also modified to reflect this requirement.
Fast-isel was not creating correct code for loading floating-point constants
using large code model. This also requires the addis/ld form of addressing.
Previously we were using the addis/lfd shortcut which is only applicable to
medium code model. One test case is modified to reflect this requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190882 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC')
| -rw-r--r-- | test/CodeGen/PowerPC/mcm-2.ll | 8 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/mcm-3.ll | 8 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/mcm-4.ll | 4 |
3 files changed, 12 insertions, 8 deletions
diff --git a/test/CodeGen/PowerPC/mcm-2.ll b/test/CodeGen/PowerPC/mcm-2.ll index d4f40f7..fee98d8 100644 --- a/test/CodeGen/PowerPC/mcm-2.ll +++ b/test/CodeGen/PowerPC/mcm-2.ll @@ -31,7 +31,9 @@ entry: ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) ; LARGE: lwz {{[0-9]+}}, 0([[REG2]]) ; LARGE: stw {{[0-9]+}}, 0([[REG2]]) -; LARGE: .type [[VAR]],@object -; LARGE: .local [[VAR]] -; LARGE: .comm [[VAR]],4,4 +; LARGE: [[VAR]]: +; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]] +; LARGE: .type [[VAR2]],@object +; LARGE: .local [[VAR2]] +; LARGE: .comm [[VAR2]],4,4 diff --git a/test/CodeGen/PowerPC/mcm-3.ll b/test/CodeGen/PowerPC/mcm-3.ll index ce151fb..b6d681d 100644 --- a/test/CodeGen/PowerPC/mcm-3.ll +++ b/test/CodeGen/PowerPC/mcm-3.ll @@ -33,9 +33,11 @@ entry: ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) ; LARGE: lwz {{[0-9]+}}, 0([[REG2]]) ; LARGE: stw {{[0-9]+}}, 0([[REG2]]) -; LARGE: .type [[VAR]],@object -; LARGE: .data -; LARGE: .globl [[VAR]] ; LARGE: [[VAR]]: +; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]] +; LARGE: .type [[VAR2]],@object +; LARGE: .data +; LARGE: .globl [[VAR2]] +; LARGE: [[VAR2]]: ; LARGE: .long 5 diff --git a/test/CodeGen/PowerPC/mcm-4.ll b/test/CodeGen/PowerPC/mcm-4.ll index 7d7b132..73dd902 100644 --- a/test/CodeGen/PowerPC/mcm-4.ll +++ b/test/CodeGen/PowerPC/mcm-4.ll @@ -22,6 +22,6 @@ entry: ; LARGE: [[VAR:[a-z0-9A-Z_.]+]]: ; LARGE: .quad 4562098671269285104 ; LARGE-LABEL: test_double_const: -; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha -; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) +; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha +; LARGE: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]]) ; LARGE: lfd {{[0-9]+}}, 0([[REG2]]) |