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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-27 00:02:20 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-27 00:02:20 +0000 |
| commit | b7e11e400dabced046e7ec53a66926716563bb36 (patch) | |
| tree | ac0269c393018ee12ba343e3e1f3fa47d8368cb3 /test/CodeGen/PowerPC | |
| parent | ca442a4a1aabf6199e5aee09ec604e79916d9b92 (diff) | |
| download | external_llvm-b7e11e400dabced046e7ec53a66926716563bb36.zip external_llvm-b7e11e400dabced046e7ec53a66926716563bb36.tar.gz external_llvm-b7e11e400dabced046e7ec53a66926716563bb36.tar.bz2 | |
Don't spill PPC VRSAVE on non-Darwin (even in SjLj)
As Bill Schmidt pointed out to me, only on Darwin do we need to spill/restore
VRSAVE in the SjLj code. For non-Darwin, don't spill/restore VRSAVE (and I've
added some asserts to make sure that we're not).
As it turns out, we're not currently handling the Darwin case correctly (I've
added a FIXME in the test case). I've tried adding various implied register
definitions/uses to force the spill without success, so I'll need to address
this later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178096 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC')
| -rw-r--r-- | test/CodeGen/PowerPC/sjlj.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/vrsave-spill.ll | 11 |
2 files changed, 10 insertions, 5 deletions
diff --git a/test/CodeGen/PowerPC/sjlj.ll b/test/CodeGen/PowerPC/sjlj.ll index 3440b31..7ea35da 100644 --- a/test/CodeGen/PowerPC/sjlj.ll +++ b/test/CodeGen/PowerPC/sjlj.ll @@ -57,8 +57,12 @@ return: ; preds = %if.end, %if.then %3 = load i32* %retval ret i32 %3 +; FIXME: We should be saving VRSAVE on Darwin, but we're not! + ; CHECK: @main ; CHECK: std +; Make sure that we're not saving VRSAVE on non-Darwin: +; CHECK-NOT: mfspr ; CHECK: stfd ; CHECK: stvx diff --git a/test/CodeGen/PowerPC/vrsave-spill.ll b/test/CodeGen/PowerPC/vrsave-spill.ll index d4b07bc..c73206d 100644 --- a/test/CodeGen/PowerPC/vrsave-spill.ll +++ b/test/CodeGen/PowerPC/vrsave-spill.ll @@ -1,18 +1,19 @@ -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-apple-darwin -mcpu=g5 | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" -target triple = "powerpc64-unknown-linux-gnu" +target triple = "powerpc64-apple-darwin" define <4 x float> @foo(<4 x float> %a, <4 x float> %b) nounwind { entry: %c = fadd <4 x float> %a, %b + %d = fmul <4 x float> %c, %a call void asm sideeffect "", "~{VRsave}"() nounwind br label %return ; CHECK: @foo -; CHECK: mfspr {{[0-9]+}}, 256 -; CHECK: mtspr 256, {{[0-9]+}} +; CHECK: mfspr r{{[0-9]+}}, 256 +; CHECK: mtspr 256, r{{[0-9]+}} return: ; preds = %entry - ret <4 x float> %c + ret <4 x float> %d } |