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| author | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
| commit | ebe69fe11e48d322045d5949c83283927a0d790b (patch) | |
| tree | c92f1907a6b8006628a4b01615f38264d29834ea /test/CodeGen/R600/128bit-kernel-args.ll | |
| parent | b7d2e72b02a4cb8034f32f8247a2558d2434e121 (diff) | |
| download | external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.zip external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.gz external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.bz2 | |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
Diffstat (limited to 'test/CodeGen/R600/128bit-kernel-args.ll')
| -rw-r--r-- | test/CodeGen/R600/128bit-kernel-args.ll | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/test/CodeGen/R600/128bit-kernel-args.ll b/test/CodeGen/R600/128bit-kernel-args.ll index d9b0ff2..557d86a 100644 --- a/test/CodeGen/R600/128bit-kernel-args.ll +++ b/test/CodeGen/R600/128bit-kernel-args.ll @@ -1,26 +1,27 @@ -; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK -; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600 +; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI -; R600-CHECK: {{^}}v4i32_kernel_arg: -; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR:[0-9]]].X, KC0[3].Y -; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR]].Y, KC0[3].Z -; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR]].Z, KC0[3].W -; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR]].W, KC0[4].X -; SI-CHECK: {{^}}v4i32_kernel_arg: -; SI-CHECK: buffer_store_dwordx4 +; R600: {{^}}v4i32_kernel_arg: +; R600-DAG: MOV {{[* ]*}}T[[GPR:[0-9]]].X, KC0[3].Y +; R600-DAG: MOV {{[* ]*}}T[[GPR]].Y, KC0[3].Z +; R600-DAG: MOV {{[* ]*}}T[[GPR]].Z, KC0[3].W +; R600-DAG: MOV {{[* ]*}}T[[GPR]].W, KC0[4].X +; SI: {{^}}v4i32_kernel_arg: +; SI: buffer_store_dwordx4 define void @v4i32_kernel_arg(<4 x i32> addrspace(1)* %out, <4 x i32> %in) { entry: store <4 x i32> %in, <4 x i32> addrspace(1)* %out ret void } -; R600-CHECK: {{^}}v4f32_kernel_arg: -; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR:[0-9]]].X, KC0[3].Y -; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR]].Y, KC0[3].Z -; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR]].Z, KC0[3].W -; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR]].W, KC0[4].X -; SI-CHECK: {{^}}v4f32_kernel_arg: -; SI-CHECK: buffer_store_dwordx4 +; R600: {{^}}v4f32_kernel_arg: +; R600-DAG: MOV {{[* ]*}}T[[GPR:[0-9]]].X, KC0[3].Y +; R600-DAG: MOV {{[* ]*}}T[[GPR]].Y, KC0[3].Z +; R600-DAG: MOV {{[* ]*}}T[[GPR]].Z, KC0[3].W +; R600-DAG: MOV {{[* ]*}}T[[GPR]].W, KC0[4].X +; SI: {{^}}v4f32_kernel_arg: +; SI: buffer_store_dwordx4 define void @v4f32_kernel_arg(<4 x float> addrspace(1)* %out, <4 x float> %in) { entry: store <4 x float> %in, <4 x float> addrspace(1)* %out |