diff options
author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
---|---|---|
committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/R600/ctpop64.ll | |
parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/R600/ctpop64.ll')
-rw-r--r-- | test/CodeGen/R600/ctpop64.ll | 109 |
1 files changed, 54 insertions, 55 deletions
diff --git a/test/CodeGen/R600/ctpop64.ll b/test/CodeGen/R600/ctpop64.ll index b36ecc6..2efac8f 100644 --- a/test/CodeGen/R600/ctpop64.ll +++ b/test/CodeGen/R600/ctpop64.ll @@ -6,12 +6,12 @@ declare <4 x i64> @llvm.ctpop.v4i64(<4 x i64>) nounwind readnone declare <8 x i64> @llvm.ctpop.v8i64(<8 x i64>) nounwind readnone declare <16 x i64> @llvm.ctpop.v16i64(<16 x i64>) nounwind readnone -; FUNC-LABEL: @s_ctpop_i64: -; SI: S_LOAD_DWORDX2 [[SVAL:s\[[0-9]+:[0-9]+\]]], -; SI: S_BCNT1_I32_B64 [[SRESULT:s[0-9]+]], [[SVAL]] -; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] -; SI: BUFFER_STORE_DWORD [[VRESULT]], -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}s_ctpop_i64: +; SI: s_load_dwordx2 [[SVAL:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0xb +; SI: s_bcnt1_i32_b64 [[SRESULT:s[0-9]+]], [[SVAL]] +; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] +; SI: buffer_store_dword [[VRESULT]], +; SI: s_endpgm define void @s_ctpop_i64(i32 addrspace(1)* noalias %out, i64 %val) nounwind { %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone %truncctpop = trunc i64 %ctpop to i32 @@ -19,13 +19,13 @@ define void @s_ctpop_i64(i32 addrspace(1)* noalias %out, i64 %val) nounwind { ret void } -; FUNC-LABEL: @v_ctpop_i64: -; SI: BUFFER_LOAD_DWORDX2 v{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, -; SI: V_MOV_B32_e32 [[VZERO:v[0-9]+]], 0 -; SI: V_BCNT_U32_B32_e32 [[MIDRESULT:v[0-9]+]], v[[LOVAL]], [[VZERO]] -; SI-NEXT: V_BCNT_U32_B32_e32 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]] -; SI: BUFFER_STORE_DWORD [[RESULT]], -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}v_ctpop_i64: +; SI: buffer_load_dwordx2 v{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, +; SI: v_mov_b32_e32 [[VZERO:v[0-9]+]], 0 +; SI: v_bcnt_u32_b32_e32 [[MIDRESULT:v[0-9]+]], v[[LOVAL]], [[VZERO]] +; SI-NEXT: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]] +; SI: buffer_store_dword [[RESULT]], +; SI: s_endpgm define void @v_ctpop_i64(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { %val = load i64 addrspace(1)* %in, align 8 %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone @@ -34,10 +34,10 @@ define void @v_ctpop_i64(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noali ret void } -; FUNC-LABEL: @s_ctpop_v2i64: -; SI: S_BCNT1_I32_B64 -; SI: S_BCNT1_I32_B64 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}s_ctpop_v2i64: +; SI: s_bcnt1_i32_b64 +; SI: s_bcnt1_i32_b64 +; SI: s_endpgm define void @s_ctpop_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> %val) nounwind { %ctpop = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %val) nounwind readnone %truncctpop = trunc <2 x i64> %ctpop to <2 x i32> @@ -45,12 +45,12 @@ define void @s_ctpop_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> %val) ret void } -; FUNC-LABEL: @s_ctpop_v4i64: -; SI: S_BCNT1_I32_B64 -; SI: S_BCNT1_I32_B64 -; SI: S_BCNT1_I32_B64 -; SI: S_BCNT1_I32_B64 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}s_ctpop_v4i64: +; SI: s_bcnt1_i32_b64 +; SI: s_bcnt1_i32_b64 +; SI: s_bcnt1_i32_b64 +; SI: s_bcnt1_i32_b64 +; SI: s_endpgm define void @s_ctpop_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> %val) nounwind { %ctpop = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %val) nounwind readnone %truncctpop = trunc <4 x i64> %ctpop to <4 x i32> @@ -58,12 +58,12 @@ define void @s_ctpop_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> %val) ret void } -; FUNC-LABEL: @v_ctpop_v2i64: -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}v_ctpop_v2i64: +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: s_endpgm define void @v_ctpop_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %in) nounwind { %val = load <2 x i64> addrspace(1)* %in, align 16 %ctpop = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %val) nounwind readnone @@ -72,16 +72,16 @@ define void @v_ctpop_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> addrs ret void } -; FUNC-LABEL: @v_ctpop_v4i64: -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: V_BCNT_U32_B32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}v_ctpop_v4i64: +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: v_bcnt_u32_b32 +; SI: s_endpgm define void @v_ctpop_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> addrspace(1)* noalias %in) nounwind { %val = load <4 x i64> addrspace(1)* %in, align 32 %ctpop = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %val) nounwind readnone @@ -93,30 +93,29 @@ define void @v_ctpop_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> addrs ; FIXME: We currently disallow SALU instructions in all branches, ; but there are some cases when the should be allowed. -; FUNC-LABEL: @ctpop_i64_in_br -; SI: V_BCNT_U32_B32_e64 [[BCNT_LO:v[0-9]+]], v{{[0-9]+}}, 0 -; SI: V_BCNT_U32_B32_e32 v[[BCNT:[0-9]+]], v{{[0-9]+}}, [[BCNT_LO]] -; SI: V_MOV_B32_e32 v[[ZERO:[0-9]+]], 0 -; SI: BUFFER_STORE_DWORDX2 v[ -; SI: [[BCNT]]:[[ZERO]]] -; SI: S_ENDPGM -define void @ctpop_i64_in_br(i64 addrspace(1)* %out, i64 addrspace(1)* %in, i32 %cond) { +; FUNC-LABEL: {{^}}ctpop_i64_in_br: +; SI: s_load_dwordx2 s{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0xd +; SI: s_bcnt1_i32_b64 [[RESULT:s[0-9]+]], {{s\[}}[[LOVAL]]:[[HIVAL]]{{\]}} +; SI: v_mov_b32_e32 v[[VLO:[0-9]+]], [[RESULT]] +; SI: v_mov_b32_e32 v[[VHI:[0-9]+]], s[[HIVAL]] +; SI: buffer_store_dwordx2 {{v\[}}[[VLO]]:[[VHI]]{{\]}} +; SI: s_endpgm +define void @ctpop_i64_in_br(i64 addrspace(1)* %out, i64 addrspace(1)* %in, i64 %ctpop_arg, i32 %cond) { entry: - %0 = icmp eq i32 %cond, 0 - br i1 %0, label %if, label %else + %tmp0 = icmp eq i32 %cond, 0 + br i1 %tmp0, label %if, label %else if: - %1 = load i64 addrspace(1)* %in - %2 = call i64 @llvm.ctpop.i64(i64 %1) + %tmp2 = call i64 @llvm.ctpop.i64(i64 %ctpop_arg) br label %endif else: - %3 = getelementptr i64 addrspace(1)* %in, i32 1 - %4 = load i64 addrspace(1)* %3 + %tmp3 = getelementptr i64 addrspace(1)* %in, i32 1 + %tmp4 = load i64 addrspace(1)* %tmp3 br label %endif endif: - %5 = phi i64 [%2, %if], [%4, %else] - store i64 %5, i64 addrspace(1)* %out + %tmp5 = phi i64 [%tmp2, %if], [%tmp4, %else] + store i64 %tmp5, i64 addrspace(1)* %out ret void } |