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authorTom Stellard <thomas.stellard@amd.com>2012-12-11 21:25:42 +0000
committerTom Stellard <thomas.stellard@amd.com>2012-12-11 21:25:42 +0000
commitf98f2ce29e6e2996fa58f38979143eceaa818335 (patch)
tree86dffe7414e6657874db8ac36e5ddcf7d41b2d9c /test/CodeGen/R600/fcmp-cnde-int-args.ll
parent57ac1f458a754f30cf500410b438fb260f9b8fe5 (diff)
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Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/fcmp-cnde-int-args.ll')
-rw-r--r--test/CodeGen/R600/fcmp-cnde-int-args.ll16
1 files changed, 16 insertions, 0 deletions
diff --git a/test/CodeGen/R600/fcmp-cnde-int-args.ll b/test/CodeGen/R600/fcmp-cnde-int-args.ll
new file mode 100644
index 0000000..5c981ef
--- /dev/null
+++ b/test/CodeGen/R600/fcmp-cnde-int-args.ll
@@ -0,0 +1,16 @@
+;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+
+; This test checks a bug in R600TargetLowering::LowerSELECT_CC where the
+; chance to optimize the fcmp + select instructions to CNDE was missed
+; due to the fact that the operands to fcmp and select had different types
+
+;CHECK: CNDE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], literal.x, 0.0, -1}}
+
+define void @test(i32 addrspace(1)* %out, float addrspace(1)* %in) {
+entry:
+ %0 = load float addrspace(1)* %in
+ %cmp = fcmp oeq float %0, 0.000000e+00
+ %value = select i1 %cmp, i32 -1, i32 0
+ store i32 %value, i32 addrspace(1)* %out
+ ret void
+}