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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-11-12 02:35:51 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-11-12 02:35:51 +0000 |
| commit | 86245071b52f1da99ac65157c38bfa5577a80714 (patch) | |
| tree | 4bd0a466a4ba45e90f29e208c4d716cc0ab8fdaa /test/CodeGen/R600/fconst64.ll | |
| parent | c6d4d667a8a56b341fac949153ec5939857445df (diff) | |
| download | external_llvm-86245071b52f1da99ac65157c38bfa5577a80714.zip external_llvm-86245071b52f1da99ac65157c38bfa5577a80714.tar.gz external_llvm-86245071b52f1da99ac65157c38bfa5577a80714.tar.bz2 | |
R600/SI: Change formatting of printed registers.
Print the range of registers used with a single letter prefix.
This better matches what the shader compiler produces and
is overall less obnoxious than concatenating all of the
subregister names together.
Instead of SGPR0, it will print s0. Instead of SGPR0_SGPR1,
it will print s[0:1] and so on.
There doesn't appear to be a straightforward way
to get the actual register info in the InstPrinter,
so this parses the generated name to print with the
new syntax.
The required test changes are pretty nasty, and register
matching regexes are now worse. Since there isn't a way to
add to a variable in FileCheck, some of the tests now don't
check the exact number of registers used, but I don't think that
will be a real problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194443 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/fconst64.ll')
| -rw-r--r-- | test/CodeGen/R600/fconst64.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/R600/fconst64.ll b/test/CodeGen/R600/fconst64.ll index 7433c56..5c5ee7e 100644 --- a/test/CodeGen/R600/fconst64.ll +++ b/test/CodeGen/R600/fconst64.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=r600 -mcpu=tahiti -verify-machineinstrs | FileCheck %s ; CHECK: @fconst_f64 -; CHECK: V_MOV_B32_e32 {{VGPR[0-9]+}}, 0.000000e+00 -; CHECK-NEXT: V_MOV_B32_e32 {{VGPR[0-9]+}}, 2.312500e+00 +; CHECK: V_MOV_B32_e32 {{v[0-9]+}}, 0.000000e+00 +; CHECK-NEXT: V_MOV_B32_e32 {{v[0-9]+}}, 2.312500e+00 define void @fconst_f64(double addrspace(1)* %out, double addrspace(1)* %in) { %r1 = load double addrspace(1)* %in |