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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-01 15:23:42 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-01 15:23:42 +0000 |
| commit | 692ee102ebef535d311c35d53457028083e5c5be (patch) | |
| tree | 5966632bb87e4120a27dadfce4187535429a4275 /test/CodeGen/R600/fp_to_sint.ll | |
| parent | 98b357e1cd0d41108e6011725dad6a6dbf208a38 (diff) | |
| download | external_llvm-692ee102ebef535d311c35d53457028083e5c5be.zip external_llvm-692ee102ebef535d311c35d53457028083e5c5be.tar.gz external_llvm-692ee102ebef535d311c35d53457028083e5c5be.tar.bz2 | |
R600: Add 64-bit float load/store support
* Added R600_Reg64 class
* Added T#Index#.XY registers definition
* Added v2i32 register reads from parameter and global space
* Added f32 and i32 elements extraction from v2f32 and v2i32
* Added v2i32 -> v2f32 conversions
Tom Stellard:
- Mark vec2 operations as expand. The addition of a vec2 register
class made them all legal.
Patch by: Dmitry Cherkassov
Signed-off-by: Dmitry Cherkassov <dcherkassov@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187582 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/fp_to_sint.ll')
| -rw-r--r-- | test/CodeGen/R600/fp_to_sint.ll | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/test/CodeGen/R600/fp_to_sint.ll b/test/CodeGen/R600/fp_to_sint.ll index 7b430e3..6471270 100644 --- a/test/CodeGen/R600/fp_to_sint.ll +++ b/test/CodeGen/R600/fp_to_sint.ll @@ -1,6 +1,18 @@ ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK +; R600-CHECK: @fp_to_sint_v2i32 +; R600-CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], PV\.[XYZW]}} +; R600-CHECK: FLT_TO_INT * T{{[0-9]+\.[XYZW], PV\.[XYZW]}} +; SI-CHECK: @fp_to_sint_v2i32 +; SI-CHECK: V_CVT_I32_F32_e32 +; SI-CHECK: V_CVT_I32_F32_e32 +define void @fp_to_sint_v2i32(<2 x i32> addrspace(1)* %out, <2 x float> %in) { + %result = fptosi <2 x float> %in to <2 x i32> + store <2 x i32> %result, <2 x i32> addrspace(1)* %out + ret void +} + ; R600-CHECK: @fp_to_sint_v4i32 ; R600-CHECK: FLT_TO_INT {{[* ]*}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} ; R600-CHECK: FLT_TO_INT {{[* ]*}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} @@ -11,7 +23,6 @@ ; SI-CHECK: V_CVT_I32_F32_e32 ; SI-CHECK: V_CVT_I32_F32_e32 ; SI-CHECK: V_CVT_I32_F32_e32 - define void @fp_to_sint_v4i32(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { %value = load <4 x float> addrspace(1) * %in %result = fptosi <4 x float> %value to <4 x i32> |