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author | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2015-03-23 12:10:34 -0700 |
commit | ebe69fe11e48d322045d5949c83283927a0d790b (patch) | |
tree | c92f1907a6b8006628a4b01615f38264d29834ea /test/CodeGen/R600/frem.ll | |
parent | b7d2e72b02a4cb8034f32f8247a2558d2434e121 (diff) | |
download | external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.zip external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.gz external_llvm-ebe69fe11e48d322045d5949c83283927a0d790b.tar.bz2 |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
Diffstat (limited to 'test/CodeGen/R600/frem.ll')
-rw-r--r-- | test/CodeGen/R600/frem.ll | 63 |
1 files changed, 36 insertions, 27 deletions
diff --git a/test/CodeGen/R600/frem.ll b/test/CodeGen/R600/frem.ll index c846a77..02a0070 100644 --- a/test/CodeGen/R600/frem.ll +++ b/test/CodeGen/R600/frem.ll @@ -1,16 +1,18 @@ -; RUN: llc -march=r600 -mcpu=SI -enable-misched < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI -enable-misched < %s | FileCheck -check-prefix=SI -check-prefix=GCN -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=bonaire -enable-misched < %s | FileCheck -check-prefix=CI -check-prefix=GCN -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -enable-misched < %s | FileCheck -check-prefix=CI -check-prefix=GCN -check-prefix=FUNC %s ; FUNC-LABEL: {{^}}frem_f32: -; SI-DAG: buffer_load_dword [[X:v[0-9]+]], {{.*$}} -; SI-DAG: buffer_load_dword [[Y:v[0-9]+]], {{.*}} offset:0x10 -; SI-DAG: v_cmp -; SI-DAG: v_mul_f32 -; SI: v_rcp_f32_e32 -; SI: v_mul_f32_e32 -; SI: v_mul_f32_e32 -; SI: v_trunc_f32_e32 -; SI: v_mad_f32 -; SI: s_endpgm +; GCN-DAG: buffer_load_dword [[X:v[0-9]+]], {{.*$}} +; GCN-DAG: buffer_load_dword [[Y:v[0-9]+]], {{.*}} offset:16 +; GCN-DAG: v_cmp +; GCN-DAG: v_mul_f32 +; GCN: v_rcp_f32_e32 +; GCN: v_mul_f32_e32 +; GCN: v_mul_f32_e32 +; GCN: v_trunc_f32_e32 +; GCN: v_mad_f32 +; GCN: s_endpgm define void @frem_f32(float addrspace(1)* %out, float addrspace(1)* %in1, float addrspace(1)* %in2) #0 { %gep2 = getelementptr float addrspace(1)* %in2, i32 4 @@ -22,14 +24,14 @@ define void @frem_f32(float addrspace(1)* %out, float addrspace(1)* %in1, } ; FUNC-LABEL: {{^}}unsafe_frem_f32: -; SI: buffer_load_dword [[Y:v[0-9]+]], {{.*}} offset:0x10 -; SI: buffer_load_dword [[X:v[0-9]+]], {{.*}} -; SI: v_rcp_f32_e32 [[INVY:v[0-9]+]], [[Y]] -; SI: v_mul_f32_e32 [[DIV:v[0-9]+]], [[INVY]], [[X]] -; SI: v_trunc_f32_e32 [[TRUNC:v[0-9]+]], [[DIV]] -; SI: v_mad_f32 [[RESULT:v[0-9]+]], -[[TRUNC]], [[Y]], [[X]] -; SI: buffer_store_dword [[RESULT]] -; SI: s_endpgm +; GCN: buffer_load_dword [[Y:v[0-9]+]], {{.*}} offset:16 +; GCN: buffer_load_dword [[X:v[0-9]+]], {{.*}} +; GCN: v_rcp_f32_e32 [[INVY:v[0-9]+]], [[Y]] +; GCN: v_mul_f32_e32 [[DIV:v[0-9]+]], [[INVY]], [[X]] +; GCN: v_trunc_f32_e32 [[TRUNC:v[0-9]+]], [[DIV]] +; GCN: v_mad_f32 [[RESULT:v[0-9]+]], -[[TRUNC]], [[Y]], [[X]] +; GCN: buffer_store_dword [[RESULT]] +; GCN: s_endpgm define void @unsafe_frem_f32(float addrspace(1)* %out, float addrspace(1)* %in1, float addrspace(1)* %in2) #1 { %gep2 = getelementptr float addrspace(1)* %in2, i32 4 @@ -40,11 +42,17 @@ define void @unsafe_frem_f32(float addrspace(1)* %out, float addrspace(1)* %in1, ret void } -; TODO: This should check something when f64 fdiv is implemented -; correctly - ; FUNC-LABEL: {{^}}frem_f64: -; SI: s_endpgm +; GCN: buffer_load_dwordx2 [[Y:v\[[0-9]+:[0-9]+\]]], {{.*}}, 0 +; GCN: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]], {{.*}}, 0 +; GCN-DAG: v_div_fmas_f64 +; GCN-DAG: v_div_scale_f64 +; GCN-DAG: v_mul_f64 +; CI: v_trunc_f64_e32 +; CI: v_mul_f64 +; GCN: v_add_f64 +; GCN: buffer_store_dwordx2 +; GCN: s_endpgm define void @frem_f64(double addrspace(1)* %out, double addrspace(1)* %in1, double addrspace(1)* %in2) #0 { %r0 = load double addrspace(1)* %in1, align 8 @@ -55,11 +63,12 @@ define void @frem_f64(double addrspace(1)* %out, double addrspace(1)* %in1, } ; FUNC-LABEL: {{^}}unsafe_frem_f64: -; SI: v_rcp_f64_e32 -; SI: v_mul_f64 +; GCN: v_rcp_f64_e32 +; GCN: v_mul_f64 ; SI: v_bfe_u32 -; SI: v_fma_f64 -; SI: s_endpgm +; CI: v_trunc_f64_e32 +; GCN: v_fma_f64 +; GCN: s_endpgm define void @unsafe_frem_f64(double addrspace(1)* %out, double addrspace(1)* %in1, double addrspace(1)* %in2) #1 { %r0 = load double addrspace(1)* %in1, align 8 |