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author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-05 22:45:56 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-05 22:45:56 +0000 |
commit | c1ad37e5cd79e8a35263216ca0f2ac1ca6615ac7 (patch) | |
tree | b658f6b80492cd81fbb836fdd77ab6148a13a95d /test/CodeGen/R600/indirect-addressing-si.ll | |
parent | 4c5be13890f723d78a92d4c96006f9102c4580a0 (diff) | |
download | external_llvm-c1ad37e5cd79e8a35263216ca0f2ac1ca6615ac7.zip external_llvm-c1ad37e5cd79e8a35263216ca0f2ac1ca6615ac7.tar.gz external_llvm-c1ad37e5cd79e8a35263216ca0f2ac1ca6615ac7.tar.bz2 |
R600/SI: Add missing test for r187749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187754 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/indirect-addressing-si.ll')
-rw-r--r-- | test/CodeGen/R600/indirect-addressing-si.ll | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/test/CodeGen/R600/indirect-addressing-si.ll b/test/CodeGen/R600/indirect-addressing-si.ll new file mode 100644 index 0000000..ba5de22 --- /dev/null +++ b/test/CodeGen/R600/indirect-addressing-si.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s + +; Tests for indirect addressing on SI, which is implemented using dynamic +; indexing of vectors. + +; CHECK: extract_w_offset +; CHECK: S_MOV_B32 M0 +; CHECK-NEXT: V_MOVRELS_B32_e32 +define void @extract_w_offset(float addrspace(1)* %out, i32 %in) { +entry: + %0 = add i32 %in, 1 + %1 = extractelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, i32 %0 + store float %1, float addrspace(1)* %out + ret void +} + +; CHECK: extract_wo_offset +; CHECK: S_MOV_B32 M0 +; CHECK-NEXT: V_MOVRELS_B32_e32 +define void @extract_wo_offset(float addrspace(1)* %out, i32 %in) { +entry: + %0 = extractelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, i32 %in + store float %0, float addrspace(1)* %out + ret void +} + +; CHECK: insert_w_offset +; CHECK: S_MOV_B32 M0 +; CHECK-NEXT: V_MOVRELD_B32_e32 +define void @insert_w_offset(float addrspace(1)* %out, i32 %in) { +entry: + %0 = add i32 %in, 1 + %1 = insertelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, float 5.0, i32 %0 + %2 = extractelement <4 x float> %1, i32 2 + store float %2, float addrspace(1)* %out + ret void +} + +; CHECK: insert_wo_offset +; CHECK: S_MOV_B32 M0 +; CHECK-NEXT: V_MOVRELD_B32_e32 +define void @insert_wo_offset(float addrspace(1)* %out, i32 %in) { +entry: + %0 = insertelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, float 5.0, i32 %in + %1 = extractelement <4 x float> %0, i32 2 + store float %1, float addrspace(1)* %out + ret void +} |