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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 21:22:52 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-10 21:23:04 +0000 |
| commit | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/R600/lds-output-queue.ll | |
| parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
| parent | 4c5e43da7792f75567b693105cc53e3f1992ad98 (diff) | |
| download | external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.zip external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.gz external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.bz2 | |
Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/CodeGen/R600/lds-output-queue.ll')
| -rw-r--r-- | test/CodeGen/R600/lds-output-queue.ll | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/test/CodeGen/R600/lds-output-queue.ll b/test/CodeGen/R600/lds-output-queue.ll index cda75b0..44ffc36 100644 --- a/test/CodeGen/R600/lds-output-queue.ll +++ b/test/CodeGen/R600/lds-output-queue.ll @@ -12,12 +12,12 @@ define void @lds_input_queue(i32 addrspace(1)* %out, i32 addrspace(1)* %in, i32 %index) { entry: - %0 = getelementptr inbounds [2 x i32] addrspace(3)* @local_mem, i32 0, i32 %index - %1 = load i32 addrspace(3)* %0 + %0 = getelementptr inbounds [2 x i32], [2 x i32] addrspace(3)* @local_mem, i32 0, i32 %index + %1 = load i32, i32 addrspace(3)* %0 call void @llvm.AMDGPU.barrier.local() ; This will start a new clause for the vertex fetch - %2 = load i32 addrspace(1)* %in + %2 = load i32, i32 addrspace(1)* %in %3 = add i32 %1, %2 store i32 %3, i32 addrspace(1)* %out ret void @@ -40,9 +40,9 @@ declare void @llvm.AMDGPU.barrier.local() ; load from global memory which immediately follows a load from a global value that ; has been declared in the local memory space: ; -; %0 = getelementptr inbounds [2 x i32] addrspace(3)* @local_mem, i32 0, i32 %index -; %1 = load i32 addrspace(3)* %0 -; %2 = load i32 addrspace(1)* %in +; %0 = getelementptr inbounds [2 x i32], [2 x i32] addrspace(3)* @local_mem, i32 0, i32 %index +; %1 = load i32, i32 addrspace(3)* %0 +; %2 = load i32, i32 addrspace(1)* %in ; ; The instruction selection phase will generate ISA that looks like this: ; %OQAP = LDS_READ_RET @@ -90,9 +90,9 @@ declare void @llvm.AMDGPU.barrier.local() ; CHECK: MOV * T{{[0-9]\.[XYZW]}}, OQAP define void @local_global_alias(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { entry: - %0 = getelementptr inbounds [2 x i32] addrspace(3)* @local_mem, i32 0, i32 0 - %1 = load i32 addrspace(3)* %0 - %2 = load i32 addrspace(1)* %in + %0 = getelementptr inbounds [2 x i32], [2 x i32] addrspace(3)* @local_mem, i32 0, i32 0 + %1 = load i32, i32 addrspace(3)* %0 + %2 = load i32, i32 addrspace(1)* %in %3 = add i32 %2, %1 store i32 %3, i32 addrspace(1)* %out ret void |