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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/R600/llvm.AMDGPU.bfm.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/R600/llvm.AMDGPU.bfm.ll')
| -rw-r--r-- | test/CodeGen/R600/llvm.AMDGPU.bfm.ll | 27 |
1 files changed, 23 insertions, 4 deletions
diff --git a/test/CodeGen/R600/llvm.AMDGPU.bfm.ll b/test/CodeGen/R600/llvm.AMDGPU.bfm.ll index 2346f40..5049228 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.bfm.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.bfm.ll @@ -5,7 +5,7 @@ declare i32 @llvm.AMDGPU.bfm(i32, i32) nounwind readnone ; FUNC-LABEL: {{^}}bfm_arg_arg: -; SI: v_bfm +; SI: s_bfm_b32 {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} ; EG: BFM_INT define void @bfm_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1) nounwind { %bfm = call i32 @llvm.AMDGPU.bfm(i32 %src0, i32 %src1) nounwind readnone @@ -14,7 +14,7 @@ define void @bfm_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1) nounwind } ; FUNC-LABEL: {{^}}bfm_arg_imm: -; SI: v_bfm +; SI: s_bfm_b32 {{s[0-9]+}}, {{s[0-9]+}}, 0x7b ; EG: BFM_INT define void @bfm_arg_imm(i32 addrspace(1)* %out, i32 %src0) nounwind { %bfm = call i32 @llvm.AMDGPU.bfm(i32 %src0, i32 123) nounwind readnone @@ -23,7 +23,7 @@ define void @bfm_arg_imm(i32 addrspace(1)* %out, i32 %src0) nounwind { } ; FUNC-LABEL: {{^}}bfm_imm_arg: -; SI: v_bfm +; SI: s_bfm_b32 {{s[0-9]+}}, 0x7b, {{s[0-9]+}} ; EG: BFM_INT define void @bfm_imm_arg(i32 addrspace(1)* %out, i32 %src1) nounwind { %bfm = call i32 @llvm.AMDGPU.bfm(i32 123, i32 %src1) nounwind readnone @@ -32,10 +32,29 @@ define void @bfm_imm_arg(i32 addrspace(1)* %out, i32 %src1) nounwind { } ; FUNC-LABEL: {{^}}bfm_imm_imm: -; SI: v_bfm +; SI: s_bfm_b32 {{s[0-9]+}}, 0x7b, 0x1c8 ; EG: BFM_INT define void @bfm_imm_imm(i32 addrspace(1)* %out) nounwind { %bfm = call i32 @llvm.AMDGPU.bfm(i32 123, i32 456) nounwind readnone store i32 %bfm, i32 addrspace(1)* %out, align 4 ret void } + +; FUNC-LABEL: {{^}}bfm_pattern: +; SI: s_bfm_b32 {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} +define void @bfm_pattern(i32 addrspace(1)* %out, i32 %x, i32 %y) { + %a = shl i32 1, %x + %b = sub i32 %a, 1 + %c = shl i32 %b, %y + store i32 %c, i32 addrspace(1)* %out + ret void +} + +; FUNC-LABEL: {{^}}bfm_pattern_simple: +; SI: s_bfm_b32 {{s[0-9]+}}, {{s[0-9]+}}, 0 +define void @bfm_pattern_simple(i32 addrspace(1)* %out, i32 %x) { + %a = shl i32 1, %x + %b = sub i32 %a, 1 + store i32 %b, i32 addrspace(1)* %out + ret void +} |