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authorPirama Arumuga Nainar <pirama@google.com>2015-04-10 21:22:52 +0000
committerGerrit Code Review <noreply-gerritcodereview@google.com>2015-04-10 21:23:04 +0000
commit31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch)
tree1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/R600/llvm.AMDGPU.brev.ll
parentc75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff)
parent4c5e43da7792f75567b693105cc53e3f1992ad98 (diff)
downloadexternal_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.zip
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Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/CodeGen/R600/llvm.AMDGPU.brev.ll')
-rw-r--r--test/CodeGen/R600/llvm.AMDGPU.brev.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/R600/llvm.AMDGPU.brev.ll b/test/CodeGen/R600/llvm.AMDGPU.brev.ll
index 3973f53..301de4b 100644
--- a/test/CodeGen/R600/llvm.AMDGPU.brev.ll
+++ b/test/CodeGen/R600/llvm.AMDGPU.brev.ll
@@ -21,7 +21,7 @@ define void @s_brev_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
; SI: buffer_store_dword [[RESULT]],
; SI: s_endpgm
define void @v_brev_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
- %val = load i32 addrspace(1)* %valptr, align 4
+ %val = load i32, i32 addrspace(1)* %valptr, align 4
%ctlz = call i32 @llvm.AMDGPU.brev(i32 %val) nounwind readnone
store i32 %ctlz, i32 addrspace(1)* %out, align 4
ret void