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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/R600/llvm.AMDGPU.rsq.ll | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/R600/llvm.AMDGPU.rsq.ll')
| -rw-r--r-- | test/CodeGen/R600/llvm.AMDGPU.rsq.ll | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/test/CodeGen/R600/llvm.AMDGPU.rsq.ll b/test/CodeGen/R600/llvm.AMDGPU.rsq.ll index 27cf6b2..d6299b8 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.rsq.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.rsq.ll @@ -3,11 +3,30 @@ declare float @llvm.AMDGPU.rsq.f32(float) nounwind readnone -; FUNC-LABEL: @rsq_f32 -; SI: V_RSQ_F32_e32 +; FUNC-LABEL: {{^}}rsq_f32: +; SI: v_rsq_f32_e32 {{v[0-9]+}}, {{s[0-9]+}} ; EG: RECIPSQRT_IEEE define void @rsq_f32(float addrspace(1)* %out, float %src) nounwind { %rsq = call float @llvm.AMDGPU.rsq.f32(float %src) nounwind readnone store float %rsq, float addrspace(1)* %out, align 4 ret void } + +; TODO: Really these should be constant folded +; FUNC-LABEL: {{^}}rsq_f32_constant_4.0 +; SI: v_rsq_f32_e32 {{v[0-9]+}}, 4.0 +; EG: RECIPSQRT_IEEE +define void @rsq_f32_constant_4.0(float addrspace(1)* %out) nounwind { + %rsq = call float @llvm.AMDGPU.rsq.f32(float 4.0) nounwind readnone + store float %rsq, float addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: {{^}}rsq_f32_constant_100.0 +; SI: v_rsq_f32_e32 {{v[0-9]+}}, 0x42c80000 +; EG: RECIPSQRT_IEEE +define void @rsq_f32_constant_100.0(float addrspace(1)* %out) nounwind { + %rsq = call float @llvm.AMDGPU.rsq.f32(float 100.0) nounwind readnone + store float %rsq, float addrspace(1)* %out, align 4 + ret void +} |