diff options
| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/R600/llvm.AMDGPU.umad24.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/R600/llvm.AMDGPU.umad24.ll')
| -rw-r--r-- | test/CodeGen/R600/llvm.AMDGPU.umad24.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/R600/llvm.AMDGPU.umad24.ll b/test/CodeGen/R600/llvm.AMDGPU.umad24.ll index 88613db..77a073b 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.umad24.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.umad24.ll @@ -25,12 +25,12 @@ define void @test_umad24(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2 ; SI: buffer_store_dword [[RESULT]] define void @commute_umad24(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone - %out.gep = getelementptr i32 addrspace(1)* %out, i32 %tid - %src0.gep = getelementptr i32 addrspace(1)* %out, i32 %tid - %src2.gep = getelementptr i32 addrspace(1)* %src0.gep, i32 1 + %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid + %src0.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid + %src2.gep = getelementptr i32, i32 addrspace(1)* %src0.gep, i32 1 - %src0 = load i32 addrspace(1)* %src0.gep, align 4 - %src2 = load i32 addrspace(1)* %src2.gep, align 4 + %src0 = load i32, i32 addrspace(1)* %src0.gep, align 4 + %src2 = load i32, i32 addrspace(1)* %src2.gep, align 4 %mad = call i32 @llvm.AMDGPU.umad24(i32 %src0, i32 4, i32 %src2) nounwind readnone store i32 %mad, i32 addrspace(1)* %out.gep, align 4 ret void |