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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/R600/llvm.AMDGPU.umin.ll | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/R600/llvm.AMDGPU.umin.ll')
| -rw-r--r-- | test/CodeGen/R600/llvm.AMDGPU.umin.ll | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/test/CodeGen/R600/llvm.AMDGPU.umin.ll b/test/CodeGen/R600/llvm.AMDGPU.umin.ll index 08397f8..2eaa372 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.umin.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.umin.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s -; SI-LABEL: @vector_umin -; SI: V_MIN_U32_e32 +; SI-LABEL: {{^}}vector_umin: +; SI: v_min_u32_e32 define void @vector_umin(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 { main_body: %load = load i32 addrspace(1)* %in, align 4 @@ -11,8 +11,8 @@ main_body: ret void } -; SI-LABEL: @scalar_umin -; SI: S_MIN_U32 +; SI-LABEL: {{^}}scalar_umin: +; SI: s_min_u32 define void @scalar_umin(i32 %p0, i32 %p1) #0 { entry: %min = call i32 @llvm.AMDGPU.umin(i32 %p0, i32 %p1) @@ -21,11 +21,11 @@ entry: ret void } -; SI-LABEL: @trunc_zext_umin -; SI: BUFFER_LOAD_UBYTE [[VREG:v[0-9]+]], -; SI: V_MIN_U32_e32 [[RESULT:v[0-9]+]], 0, [[VREG]] -; SI-NOT: AND -; SI: BUFFER_STORE_SHORT [[RESULT]], +; SI-LABEL: {{^}}trunc_zext_umin: +; SI: buffer_load_ubyte [[VREG:v[0-9]+]], +; SI: v_min_u32_e32 [[RESULT:v[0-9]+]], 0, [[VREG]] +; SI-NOT: and +; SI: buffer_store_short [[RESULT]], define void @trunc_zext_umin(i16 addrspace(1)* nocapture %out, i8 addrspace(1)* nocapture %src) nounwind { %tmp5 = load i8 addrspace(1)* %src, align 1 %tmp2 = zext i8 %tmp5 to i32 |