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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-08 08:55:49 -0700 |
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committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-09 15:04:38 -0700 |
commit | 4c5e43da7792f75567b693105cc53e3f1992ad98 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/R600/llvm.AMDGPU.umin.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
download | external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.zip external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.gz external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.bz2 |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
Diffstat (limited to 'test/CodeGen/R600/llvm.AMDGPU.umin.ll')
-rw-r--r-- | test/CodeGen/R600/llvm.AMDGPU.umin.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/R600/llvm.AMDGPU.umin.ll b/test/CodeGen/R600/llvm.AMDGPU.umin.ll index e4cac33..2acd10e 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.umin.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.umin.ll @@ -5,7 +5,7 @@ ; SI: v_min_u32_e32 define void @vector_umin(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 { main_body: - %load = load i32 addrspace(1)* %in, align 4 + %load = load i32, i32 addrspace(1)* %in, align 4 %min = call i32 @llvm.AMDGPU.umin(i32 %p0, i32 %load) %bc = bitcast i32 %min to float call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc) @@ -28,7 +28,7 @@ entry: ; SI-NOT: and ; SI: buffer_store_short [[RESULT]], define void @trunc_zext_umin(i16 addrspace(1)* nocapture %out, i8 addrspace(1)* nocapture %src) nounwind { - %tmp5 = load i8 addrspace(1)* %src, align 1 + %tmp5 = load i8, i8 addrspace(1)* %src, align 1 %tmp2 = zext i8 %tmp5 to i32 %tmp3 = tail call i32 @llvm.AMDGPU.umin(i32 %tmp2, i32 0) nounwind readnone %tmp4 = trunc i32 %tmp3 to i8 |