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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/R600/llvm.SI.sample-masked.ll | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/R600/llvm.SI.sample-masked.ll')
| -rw-r--r-- | test/CodeGen/R600/llvm.SI.sample-masked.ll | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/test/CodeGen/R600/llvm.SI.sample-masked.ll b/test/CodeGen/R600/llvm.SI.sample-masked.ll index 445359a..9e86bec 100644 --- a/test/CodeGen/R600/llvm.SI.sample-masked.ll +++ b/test/CodeGen/R600/llvm.SI.sample-masked.ll @@ -1,7 +1,7 @@ ;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s -; CHECK-LABEL: @v1 -; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 13 +; CHECK-LABEL: {{^}}v1: +; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 13 define void @v1(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 @@ -13,8 +13,8 @@ entry: ret void } -; CHECK-LABEL: @v2 -; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 11 +; CHECK-LABEL: {{^}}v2: +; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 11 define void @v2(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 @@ -26,8 +26,8 @@ entry: ret void } -; CHECK-LABEL: @v3 -; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 14 +; CHECK-LABEL: {{^}}v3: +; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 14 define void @v3(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 @@ -39,8 +39,8 @@ entry: ret void } -; CHECK-LABEL: @v4 -; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 7 +; CHECK-LABEL: {{^}}v4: +; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 7 define void @v4(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 @@ -52,8 +52,8 @@ entry: ret void } -; CHECK-LABEL: @v5 -; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 10 +; CHECK-LABEL: {{^}}v5: +; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 10 define void @v5(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 @@ -64,8 +64,8 @@ entry: ret void } -; CHECK-LABEL: @v6 -; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 6 +; CHECK-LABEL: {{^}}v6: +; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 6 define void @v6(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 @@ -76,8 +76,8 @@ entry: ret void } -; CHECK-LABEL: @v7 -; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 9 +; CHECK-LABEL: {{^}}v7: +; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 9 define void @v7(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 |