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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/R600/llvm.SI.sample.ll | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/R600/llvm.SI.sample.ll')
| -rw-r--r-- | test/CodeGen/R600/llvm.SI.sample.ll | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/test/CodeGen/R600/llvm.SI.sample.ll b/test/CodeGen/R600/llvm.SI.sample.ll index 24e8f64..a1d2c02 100644 --- a/test/CodeGen/R600/llvm.SI.sample.ll +++ b/test/CodeGen/R600/llvm.SI.sample.ll @@ -1,21 +1,21 @@ ;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck %s -;CHECK-DAG: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 15 -;CHECK-DAG: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 3 -;CHECK-DAG: IMAGE_SAMPLE {{v[0-9]+}}, 2 -;CHECK-DAG: IMAGE_SAMPLE {{v[0-9]+}}, 1 -;CHECK-DAG: IMAGE_SAMPLE {{v[0-9]+}}, 4 -;CHECK-DAG: IMAGE_SAMPLE {{v[0-9]+}}, 8 -;CHECK-DAG: IMAGE_SAMPLE_C {{v\[[0-9]+:[0-9]+\]}}, 5 -;CHECK-DAG: IMAGE_SAMPLE_C {{v\[[0-9]+:[0-9]+\]}}, 9 -;CHECK-DAG: IMAGE_SAMPLE_C {{v\[[0-9]+:[0-9]+\]}}, 6 -;CHECK-DAG: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 10 -;CHECK-DAG: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 12 -;CHECK-DAG: IMAGE_SAMPLE_C {{v\[[0-9]+:[0-9]+\]}}, 7 -;CHECK-DAG: IMAGE_SAMPLE_C {{v\[[0-9]+:[0-9]+\]}}, 11 -;CHECK-DAG: IMAGE_SAMPLE_C {{v\[[0-9]+:[0-9]+\]}}, 13 -;CHECK-DAG: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 14 -;CHECK-DAG: IMAGE_SAMPLE {{v[0-9]+}}, 8 +;CHECK-DAG: image_sample {{v\[[0-9]+:[0-9]+\]}}, 15 +;CHECK-DAG: image_sample {{v\[[0-9]+:[0-9]+\]}}, 3 +;CHECK-DAG: image_sample {{v[0-9]+}}, 2 +;CHECK-DAG: image_sample {{v[0-9]+}}, 1 +;CHECK-DAG: image_sample {{v[0-9]+}}, 4 +;CHECK-DAG: image_sample {{v[0-9]+}}, 8 +;CHECK-DAG: image_sample_c {{v\[[0-9]+:[0-9]+\]}}, 5 +;CHECK-DAG: image_sample_c {{v\[[0-9]+:[0-9]+\]}}, 9 +;CHECK-DAG: image_sample_c {{v\[[0-9]+:[0-9]+\]}}, 6 +;CHECK-DAG: image_sample {{v\[[0-9]+:[0-9]+\]}}, 10 +;CHECK-DAG: image_sample {{v\[[0-9]+:[0-9]+\]}}, 12 +;CHECK-DAG: image_sample_c {{v\[[0-9]+:[0-9]+\]}}, 7 +;CHECK-DAG: image_sample_c {{v\[[0-9]+:[0-9]+\]}}, 11 +;CHECK-DAG: image_sample_c {{v\[[0-9]+:[0-9]+\]}}, 13 +;CHECK-DAG: image_sample {{v\[[0-9]+:[0-9]+\]}}, 14 +;CHECK-DAG: image_sample {{v[0-9]+}}, 8 define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) #0 { %v1 = insertelement <4 x i32> undef, i32 %a1, i32 0 @@ -135,8 +135,8 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) #0 { ret void } -; CHECK: @v1 -; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 15 +; CHECK: {{^}}v1: +; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 15 define void @v1(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 |