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author | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
commit | dce4a407a24b04eebc6a376f8e62b41aaa7b071f (patch) | |
tree | dcebc53f2b182f145a2e659393bf9a0472cedf23 /test/CodeGen/R600/load-i1.ll | |
parent | 220b921aed042f9e520c26cffd8282a94c66c3d5 (diff) | |
download | external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.zip external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.gz external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.bz2 |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
Diffstat (limited to 'test/CodeGen/R600/load-i1.ll')
-rw-r--r-- | test/CodeGen/R600/load-i1.ll | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/test/CodeGen/R600/load-i1.ll b/test/CodeGen/R600/load-i1.ll new file mode 100644 index 0000000..9ba81b8 --- /dev/null +++ b/test/CodeGen/R600/load-i1.ll @@ -0,0 +1,107 @@ +; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s + + +; SI-LABEL: @global_copy_i1_to_i1 +; SI: BUFFER_LOAD_UBYTE +; SI: V_AND_B32_e32 v{{[0-9]+}}, 1 +; SI: BUFFER_STORE_BYTE +; SI: S_ENDPGM +define void @global_copy_i1_to_i1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind { + %load = load i1 addrspace(1)* %in + store i1 %load, i1 addrspace(1)* %out, align 1 + ret void +} + +; SI-LABEL: @global_sextload_i1_to_i32 +; XSI: BUFFER_LOAD_BYTE +; SI: BUFFER_STORE_DWORD +; SI: S_ENDPGM +define void @global_sextload_i1_to_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind { + %load = load i1 addrspace(1)* %in + %ext = sext i1 %load to i32 + store i32 %ext, i32 addrspace(1)* %out, align 4 + ret void +} + +; SI-LABEL: @global_zextload_i1_to_i32 +; SI: BUFFER_LOAD_UBYTE +; SI: BUFFER_STORE_DWORD +; SI: S_ENDPGM +define void @global_zextload_i1_to_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind { + %load = load i1 addrspace(1)* %in + %ext = zext i1 %load to i32 + store i32 %ext, i32 addrspace(1)* %out, align 4 + ret void +} + +; SI-LABEL: @global_sextload_i1_to_i64 +; XSI: BUFFER_LOAD_BYTE +; SI: BUFFER_STORE_DWORDX2 +; SI: S_ENDPGM +define void @global_sextload_i1_to_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind { + %load = load i1 addrspace(1)* %in + %ext = sext i1 %load to i64 + store i64 %ext, i64 addrspace(1)* %out, align 4 + ret void +} + +; SI-LABEL: @global_zextload_i1_to_i64 +; SI: BUFFER_LOAD_UBYTE +; SI: BUFFER_STORE_DWORDX2 +; SI: S_ENDPGM +define void @global_zextload_i1_to_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind { + %load = load i1 addrspace(1)* %in + %ext = zext i1 %load to i64 + store i64 %ext, i64 addrspace(1)* %out, align 4 + ret void +} + +; SI-LABEL: @i1_arg +; SI: BUFFER_LOAD_UBYTE +; SI: V_AND_B32_e32 +; SI: BUFFER_STORE_BYTE +; SI: S_ENDPGM +define void @i1_arg(i1 addrspace(1)* %out, i1 %x) nounwind { + store i1 %x, i1 addrspace(1)* %out, align 1 + ret void +} + +; SI-LABEL: @i1_arg_zext_i32 +; SI: BUFFER_LOAD_UBYTE +; SI: BUFFER_STORE_DWORD +; SI: S_ENDPGM +define void @i1_arg_zext_i32(i32 addrspace(1)* %out, i1 %x) nounwind { + %ext = zext i1 %x to i32 + store i32 %ext, i32 addrspace(1)* %out, align 4 + ret void +} + +; SI-LABEL: @i1_arg_zext_i64 +; SI: BUFFER_LOAD_UBYTE +; SI: BUFFER_STORE_DWORDX2 +; SI: S_ENDPGM +define void @i1_arg_zext_i64(i64 addrspace(1)* %out, i1 %x) nounwind { + %ext = zext i1 %x to i64 + store i64 %ext, i64 addrspace(1)* %out, align 8 + ret void +} + +; SI-LABEL: @i1_arg_sext_i32 +; XSI: BUFFER_LOAD_BYTE +; SI: BUFFER_STORE_DWORD +; SI: S_ENDPGM +define void @i1_arg_sext_i32(i32 addrspace(1)* %out, i1 %x) nounwind { + %ext = sext i1 %x to i32 + store i32 %ext, i32addrspace(1)* %out, align 4 + ret void +} + +; SI-LABEL: @i1_arg_sext_i64 +; XSI: BUFFER_LOAD_BYTE +; SI: BUFFER_STORE_DWORDX2 +; SI: S_ENDPGM +define void @i1_arg_sext_i64(i64 addrspace(1)* %out, i1 %x) nounwind { + %ext = sext i1 %x to i64 + store i64 %ext, i64 addrspace(1)* %out, align 8 + ret void +} |