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author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
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committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/R600/local-atomics.ll | |
parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/R600/local-atomics.ll')
-rw-r--r-- | test/CodeGen/R600/local-atomics.ll | 486 |
1 files changed, 395 insertions, 91 deletions
diff --git a/test/CodeGen/R600/local-atomics.ll b/test/CodeGen/R600/local-atomics.ll index 5a44951..2ac811f 100644 --- a/test/CodeGen/R600/local-atomics.ll +++ b/test/CodeGen/R600/local-atomics.ll @@ -1,21 +1,25 @@ -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s - -; FUNC-LABEL: @lds_atomic_xchg_ret_i32: -; SI: S_LOAD_DWORD [[SPTR:s[0-9]+]], -; SI: V_MOV_B32_e32 [[DATA:v[0-9]+]], 4 -; SI: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]] -; SI: DS_WRXCHG_RTN_B32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]], 0x0, [M0] -; SI: BUFFER_STORE_DWORD [[RESULT]], -; SI: S_ENDPGM +; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=CI -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s + +; FUNC-LABEL: {{^}}lds_atomic_xchg_ret_i32: +; EG: LDS_WRXCHG_RET * +; SI: s_load_dword [[SPTR:s[0-9]+]], +; SI: v_mov_b32_e32 [[DATA:v[0-9]+]], 4 +; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] +; SI: ds_wrxchg_rtn_b32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]] [M0] +; SI: buffer_store_dword [[RESULT]], +; SI: s_endpgm define void @lds_atomic_xchg_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw xchg i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_xchg_ret_i32_offset: -; SI: DS_WRXCHG_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_xchg_ret_i32_offset: +; EG: LDS_WRXCHG_RET * +; SI: ds_wrxchg_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_xchg_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw xchg i32 addrspace(3)* %gep, i32 4 seq_cst @@ -24,22 +28,24 @@ define void @lds_atomic_xchg_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspac } ; XXX - Is it really necessary to load 4 into VGPR? -; FUNC-LABEL: @lds_atomic_add_ret_i32: -; SI: S_LOAD_DWORD [[SPTR:s[0-9]+]], -; SI: V_MOV_B32_e32 [[DATA:v[0-9]+]], 4 -; SI: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]] -; SI: DS_ADD_RTN_U32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]], 0x0, [M0] -; SI: BUFFER_STORE_DWORD [[RESULT]], -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_add_ret_i32: +; EG: LDS_ADD_RET * +; SI: s_load_dword [[SPTR:s[0-9]+]], +; SI: v_mov_b32_e32 [[DATA:v[0-9]+]], 4 +; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] +; SI: ds_add_rtn_u32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]] [M0] +; SI: buffer_store_dword [[RESULT]], +; SI: s_endpgm define void @lds_atomic_add_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw add i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_add_ret_i32_offset: -; SI: DS_ADD_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_add_ret_i32_offset: +; EG: LDS_ADD_RET * +; SI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_add_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst @@ -47,22 +53,38 @@ define void @lds_atomic_add_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace ret void } -; FUNC-LABEL: @lds_atomic_inc_ret_i32: -; SI: S_MOV_B32 [[SNEGONE:s[0-9]+]], -1 -; SI: V_MOV_B32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] -; SI: DS_INC_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, [[NEGONE]], 0x0 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_add_ret_i32_bad_si_offset: +; EG: LDS_ADD_RET * +; SI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} [M0] +; CI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_add_ret_i32_bad_si_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr, i32 %a, i32 %b) nounwind { + %sub = sub i32 %a, %b + %add = add i32 %sub, 4 + %gep = getelementptr i32 addrspace(3)* %ptr, i32 %add + %result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst + store i32 %result, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_inc_ret_i32: +; EG: LDS_ADD_RET * +; SI: s_mov_b32 [[SNEGONE:s[0-9]+]], -1 +; SI: v_mov_b32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] +; SI: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[NEGONE]] [M0] +; SI: s_endpgm define void @lds_atomic_inc_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw add i32 addrspace(3)* %ptr, i32 1 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_inc_ret_i32_offset: -; SI: S_MOV_B32 [[SNEGONE:s[0-9]+]], -1 -; SI: V_MOV_B32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] -; SI: DS_INC_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, [[NEGONE]], 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_inc_ret_i32_offset: +; EG: LDS_ADD_RET * +; SI: s_mov_b32 [[SNEGONE:s[0-9]+]], -1 +; SI: v_mov_b32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] +; SI: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[NEGONE]] offset:16 +; SI: s_endpgm define void @lds_atomic_inc_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw add i32 addrspace(3)* %gep, i32 1 seq_cst @@ -70,18 +92,34 @@ define void @lds_atomic_inc_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace ret void } -; FUNC-LABEL: @lds_atomic_sub_ret_i32: -; SI: DS_SUB_RTN_U32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_inc_ret_i32_bad_si_offset: +; EG: LDS_ADD_RET * +; SI: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} [M0] +; CI: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_inc_ret_i32_bad_si_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr, i32 %a, i32 %b) nounwind { + %sub = sub i32 %a, %b + %add = add i32 %sub, 4 + %gep = getelementptr i32 addrspace(3)* %ptr, i32 %add + %result = atomicrmw add i32 addrspace(3)* %gep, i32 1 seq_cst + store i32 %result, i32 addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_sub_ret_i32: +; EG: LDS_SUB_RET * +; SI: ds_sub_rtn_u32 +; SI: s_endpgm define void @lds_atomic_sub_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw sub i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_sub_ret_i32_offset: -; SI: DS_SUB_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_sub_ret_i32_offset: +; EG: LDS_SUB_RET * +; SI: ds_sub_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_sub_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw sub i32 addrspace(3)* %gep, i32 4 seq_cst @@ -89,22 +127,24 @@ define void @lds_atomic_sub_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace ret void } -; FUNC-LABEL: @lds_atomic_dec_ret_i32: -; SI: S_MOV_B32 [[SNEGONE:s[0-9]+]], -1 -; SI: V_MOV_B32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] -; SI: DS_DEC_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, [[NEGONE]], 0x0 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_dec_ret_i32: +; EG: LDS_SUB_RET * +; SI: s_mov_b32 [[SNEGONE:s[0-9]+]], -1 +; SI: v_mov_b32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] +; SI: ds_dec_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[NEGONE]] [M0] +; SI: s_endpgm define void @lds_atomic_dec_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw sub i32 addrspace(3)* %ptr, i32 1 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_dec_ret_i32_offset: -; SI: S_MOV_B32 [[SNEGONE:s[0-9]+]], -1 -; SI: V_MOV_B32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] -; SI: DS_DEC_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, [[NEGONE]], 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_dec_ret_i32_offset: +; EG: LDS_SUB_RET * +; SI: s_mov_b32 [[SNEGONE:s[0-9]+]], -1 +; SI: v_mov_b32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] +; SI: ds_dec_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[NEGONE]] offset:16 +; SI: s_endpgm define void @lds_atomic_dec_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw sub i32 addrspace(3)* %gep, i32 1 seq_cst @@ -112,18 +152,20 @@ define void @lds_atomic_dec_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace ret void } -; FUNC-LABEL: @lds_atomic_and_ret_i32: -; SI: DS_AND_RTN_B32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_and_ret_i32: +; EG: LDS_AND_RET * +; SI: ds_and_rtn_b32 +; SI: s_endpgm define void @lds_atomic_and_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw and i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_and_ret_i32_offset: -; SI: DS_AND_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_and_ret_i32_offset: +; EG: LDS_AND_RET * +; SI: ds_and_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_and_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw and i32 addrspace(3)* %gep, i32 4 seq_cst @@ -131,18 +173,20 @@ define void @lds_atomic_and_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace ret void } -; FUNC-LABEL: @lds_atomic_or_ret_i32: -; SI: DS_OR_RTN_B32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_or_ret_i32: +; EG: LDS_OR_RET * +; SI: ds_or_rtn_b32 +; SI: s_endpgm define void @lds_atomic_or_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw or i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_or_ret_i32_offset: -; SI: DS_OR_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_or_ret_i32_offset: +; EG: LDS_OR_RET * +; SI: ds_or_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_or_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw or i32 addrspace(3)* %gep, i32 4 seq_cst @@ -150,18 +194,20 @@ define void @lds_atomic_or_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace( ret void } -; FUNC-LABEL: @lds_atomic_xor_ret_i32: -; SI: DS_XOR_RTN_B32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_xor_ret_i32: +; EG: LDS_XOR_RET * +; SI: ds_xor_rtn_b32 +; SI: s_endpgm define void @lds_atomic_xor_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw xor i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_xor_ret_i32_offset: -; SI: DS_XOR_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_xor_ret_i32_offset: +; EG: LDS_XOR_RET * +; SI: ds_xor_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_xor_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw xor i32 addrspace(3)* %gep, i32 4 seq_cst @@ -170,25 +216,27 @@ define void @lds_atomic_xor_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace } ; FIXME: There is no atomic nand instr -; XFUNC-LABEL: @lds_atomic_nand_ret_i32:uction, so we somehow need to expand this. +; XFUNC-LABEL: {{^}}lds_atomic_nand_ret_i32:uction, so we somehow need to expand this. ; define void @lds_atomic_nand_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { ; %result = atomicrmw nand i32 addrspace(3)* %ptr, i32 4 seq_cst ; store i32 %result, i32 addrspace(1)* %out, align 4 ; ret void ; } -; FUNC-LABEL: @lds_atomic_min_ret_i32: -; SI: DS_MIN_RTN_I32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_min_ret_i32: +; EG: LDS_MIN_INT_RET * +; SI: ds_min_rtn_i32 +; SI: s_endpgm define void @lds_atomic_min_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw min i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_min_ret_i32_offset: -; SI: DS_MIN_RTN_I32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_min_ret_i32_offset: +; EG: LDS_MIN_INT_RET * +; SI: ds_min_rtn_i32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_min_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw min i32 addrspace(3)* %gep, i32 4 seq_cst @@ -196,18 +244,20 @@ define void @lds_atomic_min_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace ret void } -; FUNC-LABEL: @lds_atomic_max_ret_i32: -; SI: DS_MAX_RTN_I32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_max_ret_i32: +; EG: LDS_MAX_INT_RET * +; SI: ds_max_rtn_i32 +; SI: s_endpgm define void @lds_atomic_max_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw max i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_max_ret_i32_offset: -; SI: DS_MAX_RTN_I32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_max_ret_i32_offset: +; EG: LDS_MAX_INT_RET * +; SI: ds_max_rtn_i32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_max_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw max i32 addrspace(3)* %gep, i32 4 seq_cst @@ -215,18 +265,20 @@ define void @lds_atomic_max_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace ret void } -; FUNC-LABEL: @lds_atomic_umin_ret_i32: -; SI: DS_MIN_RTN_U32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_umin_ret_i32: +; EG: LDS_MIN_UINT_RET * +; SI: ds_min_rtn_u32 +; SI: s_endpgm define void @lds_atomic_umin_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw umin i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_umin_ret_i32_offset: -; SI: DS_MIN_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_umin_ret_i32_offset: +; EG: LDS_MIN_UINT_RET * +; SI: ds_min_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_umin_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw umin i32 addrspace(3)* %gep, i32 4 seq_cst @@ -234,21 +286,273 @@ define void @lds_atomic_umin_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspac ret void } -; FUNC-LABEL: @lds_atomic_umax_ret_i32: -; SI: DS_MAX_RTN_U32 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_umax_ret_i32: +; EG: LDS_MAX_UINT_RET * +; SI: ds_max_rtn_u32 +; SI: s_endpgm define void @lds_atomic_umax_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %result = atomicrmw umax i32 addrspace(3)* %ptr, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } -; FUNC-LABEL: @lds_atomic_umax_ret_i32_offset: -; SI: DS_MAX_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10 -; SI: S_ENDPGM +; FUNC-LABEL: {{^}}lds_atomic_umax_ret_i32_offset: +; EG: LDS_MAX_UINT_RET * +; SI: ds_max_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm define void @lds_atomic_umax_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind { %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 %result = atomicrmw umax i32 addrspace(3)* %gep, i32 4 seq_cst store i32 %result, i32 addrspace(1)* %out, align 4 ret void } + +; FUNC-LABEL: {{^}}lds_atomic_xchg_noret_i32: +; SI: s_load_dword [[SPTR:s[0-9]+]], +; SI: v_mov_b32_e32 [[DATA:v[0-9]+]], 4 +; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] +; SI: ds_wrxchg_rtn_b32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]] [M0] +; SI: s_endpgm +define void @lds_atomic_xchg_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw xchg i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_xchg_noret_i32_offset: +; SI: ds_wrxchg_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_xchg_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw xchg i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; XXX - Is it really necessary to load 4 into VGPR? +; FUNC-LABEL: {{^}}lds_atomic_add_noret_i32: +; SI: s_load_dword [[SPTR:s[0-9]+]], +; SI: v_mov_b32_e32 [[DATA:v[0-9]+]], 4 +; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]] +; SI: ds_add_u32 [[VPTR]], [[DATA]] [M0] +; SI: s_endpgm +define void @lds_atomic_add_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw add i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_add_noret_i32_offset: +; SI: ds_add_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_add_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_add_noret_i32_bad_si_offset +; SI: ds_add_u32 v{{[0-9]+}}, v{{[0-9]+}} [M0] +; CI: ds_add_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 [M0] +; SI: s_endpgm +define void @lds_atomic_add_noret_i32_bad_si_offset(i32 addrspace(3)* %ptr, i32 %a, i32 %b) nounwind { + %sub = sub i32 %a, %b + %add = add i32 %sub, 4 + %gep = getelementptr i32 addrspace(3)* %ptr, i32 %add + %result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_inc_noret_i32: +; SI: s_mov_b32 [[SNEGONE:s[0-9]+]], -1 +; SI: v_mov_b32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] +; SI: ds_inc_u32 v{{[0-9]+}}, [[NEGONE]] [M0] +; SI: s_endpgm +define void @lds_atomic_inc_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw add i32 addrspace(3)* %ptr, i32 1 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_inc_noret_i32_offset: +; SI: s_mov_b32 [[SNEGONE:s[0-9]+]], -1 +; SI: v_mov_b32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] +; SI: ds_inc_u32 v{{[0-9]+}}, [[NEGONE]] offset:16 +; SI: s_endpgm +define void @lds_atomic_inc_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw add i32 addrspace(3)* %gep, i32 1 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_inc_noret_i32_bad_si_offset: +; SI: ds_inc_u32 v{{[0-9]+}}, v{{[0-9]+}} +; CI: ds_inc_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_inc_noret_i32_bad_si_offset(i32 addrspace(3)* %ptr, i32 %a, i32 %b) nounwind { + %sub = sub i32 %a, %b + %add = add i32 %sub, 4 + %gep = getelementptr i32 addrspace(3)* %ptr, i32 %add + %result = atomicrmw add i32 addrspace(3)* %gep, i32 1 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_sub_noret_i32: +; SI: ds_sub_u32 +; SI: s_endpgm +define void @lds_atomic_sub_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw sub i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_sub_noret_i32_offset: +; SI: ds_sub_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_sub_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw sub i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_dec_noret_i32: +; SI: s_mov_b32 [[SNEGONE:s[0-9]+]], -1 +; SI: v_mov_b32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] +; SI: ds_dec_u32 v{{[0-9]+}}, [[NEGONE]] +; SI: s_endpgm +define void @lds_atomic_dec_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw sub i32 addrspace(3)* %ptr, i32 1 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_dec_noret_i32_offset: +; SI: s_mov_b32 [[SNEGONE:s[0-9]+]], -1 +; SI: v_mov_b32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]] +; SI: ds_dec_u32 v{{[0-9]+}}, [[NEGONE]] offset:16 +; SI: s_endpgm +define void @lds_atomic_dec_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw sub i32 addrspace(3)* %gep, i32 1 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_and_noret_i32: +; SI: ds_and_b32 +; SI: s_endpgm +define void @lds_atomic_and_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw and i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_and_noret_i32_offset: +; SI: ds_and_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_and_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw and i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_or_noret_i32: +; SI: ds_or_b32 +; SI: s_endpgm +define void @lds_atomic_or_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw or i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_or_noret_i32_offset: +; SI: ds_or_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_or_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw or i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_xor_noret_i32: +; SI: ds_xor_b32 +; SI: s_endpgm +define void @lds_atomic_xor_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw xor i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_xor_noret_i32_offset: +; SI: ds_xor_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_xor_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw xor i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; FIXME: There is no atomic nand instr +; XFUNC-LABEL: {{^}}lds_atomic_nand_noret_i32:uction, so we somehow need to expand this. +; define void @lds_atomic_nand_noret_i32(i32 addrspace(3)* %ptr) nounwind { +; %result = atomicrmw nand i32 addrspace(3)* %ptr, i32 4 seq_cst +; ret void +; } + +; FUNC-LABEL: {{^}}lds_atomic_min_noret_i32: +; SI: ds_min_i32 +; SI: s_endpgm +define void @lds_atomic_min_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw min i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_min_noret_i32_offset: +; SI: ds_min_i32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_min_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw min i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_max_noret_i32: +; SI: ds_max_i32 +; SI: s_endpgm +define void @lds_atomic_max_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw max i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_max_noret_i32_offset: +; SI: ds_max_i32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_max_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw max i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_umin_noret_i32: +; SI: ds_min_u32 +; SI: s_endpgm +define void @lds_atomic_umin_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw umin i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_umin_noret_i32_offset: +; SI: ds_min_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_umin_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw umin i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_umax_noret_i32: +; SI: ds_max_u32 +; SI: s_endpgm +define void @lds_atomic_umax_noret_i32(i32 addrspace(3)* %ptr) nounwind { + %result = atomicrmw umax i32 addrspace(3)* %ptr, i32 4 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}lds_atomic_umax_noret_i32_offset: +; SI: ds_max_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +; SI: s_endpgm +define void @lds_atomic_umax_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind { + %gep = getelementptr i32 addrspace(3)* %ptr, i32 4 + %result = atomicrmw umax i32 addrspace(3)* %gep, i32 4 seq_cst + ret void +} |