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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-07-23 01:48:49 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-07-23 01:48:49 +0000 |
| commit | 10205d5a7370f26a2c30c7f35bbaa273210bfb33 (patch) | |
| tree | 0de9870da3f4d546e6c5ec0e84168dead21a629a /test/CodeGen/R600/mad_int24.ll | |
| parent | 3f5d63b95618860ca69eeab9be37cf26a253150e (diff) | |
| download | external_llvm-10205d5a7370f26a2c30c7f35bbaa273210bfb33.zip external_llvm-10205d5a7370f26a2c30c7f35bbaa273210bfb33.tar.gz external_llvm-10205d5a7370f26a2c30c7f35bbaa273210bfb33.tar.bz2 | |
R600: Add support for 24-bit MAD instructions
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186923 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/mad_int24.ll')
| -rw-r--r-- | test/CodeGen/R600/mad_int24.ll | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/test/CodeGen/R600/mad_int24.ll b/test/CodeGen/R600/mad_int24.ll new file mode 100644 index 0000000..ce42ae7 --- /dev/null +++ b/test/CodeGen/R600/mad_int24.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK +; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM-CHECK +; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK + +; EG-CHECK: @i32_mad24 +; Signed 24-bit multiply is not supported on pre-Cayman GPUs. +; EG-CHECK: MULLO_INT +; CM-CHECK: MULADD_INT24 {{[ *]*}}T{{[0-9].[XYZW]}}, KC0[2].Z, KC0[2].W, KC0[3].X +; SI-CHECK: V_MAD_I32_I24 +define void @i32_mad24(i32 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) { +entry: + %0 = shl i32 %a, 8 + %a_24 = ashr i32 %0, 8 + %1 = shl i32 %b, 8 + %b_24 = ashr i32 %1, 8 + %2 = mul i32 %a_24, %b_24 + %3 = add i32 %2, %c + store i32 %3, i32 addrspace(1)* %out + ret void +} |