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authorVincent Lejeune <vljn@ovi.com>2013-11-11 22:10:24 +0000
committerVincent Lejeune <vljn@ovi.com>2013-11-11 22:10:24 +0000
commit70a7d5ddb4f00bbb61afe7b536c6f599f771ab9a (patch)
tree0529d234345ee92bad998240c04c98c877ef0bee /test/CodeGen/R600/max-literals.ll
parent6c7a7c6474ea60c40e2dbb15f5b6cf0265098ace (diff)
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R600: Use function inputs to represent data stored in gpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194425 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/max-literals.ll')
-rw-r--r--test/CodeGen/R600/max-literals.ll25
1 files changed, 12 insertions, 13 deletions
diff --git a/test/CodeGen/R600/max-literals.ll b/test/CodeGen/R600/max-literals.ll
index c31b7c0..65a6d2b 100644
--- a/test/CodeGen/R600/max-literals.ll
+++ b/test/CodeGen/R600/max-literals.ll
@@ -3,13 +3,13 @@
; CHECK: @main
; CHECK: ADD *
-define void @main() #0 {
+define void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1, <4 x float> inreg %reg2) #0 {
main_body:
- %0 = call float @llvm.R600.load.input(i32 4)
- %1 = call float @llvm.R600.load.input(i32 5)
- %2 = call float @llvm.R600.load.input(i32 6)
- %3 = call float @llvm.R600.load.input(i32 7)
- %4 = call float @llvm.R600.load.input(i32 8)
+ %0 = extractelement <4 x float> %reg1, i32 0
+ %1 = extractelement <4 x float> %reg1, i32 1
+ %2 = extractelement <4 x float> %reg1, i32 2
+ %3 = extractelement <4 x float> %reg1, i32 3
+ %4 = extractelement <4 x float> %reg2, i32 0
%5 = fadd float %0, 2.0
%6 = fadd float %1, 3.0
%7 = fadd float %2, 4.0
@@ -32,13 +32,13 @@ main_body:
; CHECK: @main
; CHECK-NOT: ADD *
-define void @main2() #0 {
+define void @main2(<4 x float> inreg %reg0, <4 x float> inreg %reg1, <4 x float> inreg %reg2) #0 {
main_body:
- %0 = call float @llvm.R600.load.input(i32 4)
- %1 = call float @llvm.R600.load.input(i32 5)
- %2 = call float @llvm.R600.load.input(i32 6)
- %3 = call float @llvm.R600.load.input(i32 7)
- %4 = call float @llvm.R600.load.input(i32 8)
+ %0 = extractelement <4 x float> %reg1, i32 0
+ %1 = extractelement <4 x float> %reg1, i32 1
+ %2 = extractelement <4 x float> %reg1, i32 2
+ %3 = extractelement <4 x float> %reg1, i32 3
+ %4 = extractelement <4 x float> %reg2, i32 0
%5 = fadd float %0, 2.0
%6 = fadd float %1, 3.0
%7 = fadd float %2, 4.0
@@ -59,7 +59,6 @@ main_body:
}
; Function Attrs: readnone
-declare float @llvm.R600.load.input(i32) #1
declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) #1
declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)