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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 21:22:52 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-10 21:23:04 +0000 |
commit | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/R600/mubuf.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
parent | 4c5e43da7792f75567b693105cc53e3f1992ad98 (diff) | |
download | external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.zip external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.gz external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.bz2 |
Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/CodeGen/R600/mubuf.ll')
-rw-r--r-- | test/CodeGen/R600/mubuf.ll | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/test/CodeGen/R600/mubuf.ll b/test/CodeGen/R600/mubuf.ll index 988e5c1..b19163f 100644 --- a/test/CodeGen/R600/mubuf.ll +++ b/test/CodeGen/R600/mubuf.ll @@ -11,8 +11,8 @@ declare i32 @llvm.r600.read.tidig.x() readnone ; CHECK: buffer_load_dword v{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0 offset:4 ; encoding: [0x04,0x00,0x30,0xe0 define void @mubuf_load0(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { entry: - %0 = getelementptr i32 addrspace(1)* %in, i64 1 - %1 = load i32 addrspace(1)* %0 + %0 = getelementptr i32, i32 addrspace(1)* %in, i64 1 + %1 = load i32, i32 addrspace(1)* %0 store i32 %1, i32 addrspace(1)* %out ret void } @@ -22,8 +22,8 @@ entry: ; CHECK: buffer_load_ubyte v{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0 offset:4095 ; encoding: [0xff,0x0f,0x20,0xe0 define void @mubuf_load1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) { entry: - %0 = getelementptr i8 addrspace(1)* %in, i64 4095 - %1 = load i8 addrspace(1)* %0 + %0 = getelementptr i8, i8 addrspace(1)* %in, i64 4095 + %1 = load i8, i8 addrspace(1)* %0 store i8 %1, i8 addrspace(1)* %out ret void } @@ -34,8 +34,8 @@ entry: ; CHECK: buffer_load_dword v{{[0-9]}}, s[{{[0-9]+:[0-9]+}}], [[SOFFSET]] ; encoding: [0x00,0x00,0x30,0xe0 define void @mubuf_load2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { entry: - %0 = getelementptr i32 addrspace(1)* %in, i64 1024 - %1 = load i32 addrspace(1)* %0 + %0 = getelementptr i32, i32 addrspace(1)* %in, i64 1024 + %1 = load i32, i32 addrspace(1)* %0 store i32 %1, i32 addrspace(1)* %out ret void } @@ -46,9 +46,9 @@ entry: ; CHECK: buffer_load_dword v{{[0-9]}}, v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 offset:4 ; encoding: [0x04,0x80,0x30,0xe0 define void @mubuf_load3(i32 addrspace(1)* %out, i32 addrspace(1)* %in, i64 %offset) { entry: - %0 = getelementptr i32 addrspace(1)* %in, i64 %offset - %1 = getelementptr i32 addrspace(1)* %0, i64 1 - %2 = load i32 addrspace(1)* %1 + %0 = getelementptr i32, i32 addrspace(1)* %in, i64 %offset + %1 = getelementptr i32, i32 addrspace(1)* %0, i64 1 + %2 = load i32, i32 addrspace(1)* %1 store i32 %2, i32 addrspace(1)* %out ret void } @@ -57,8 +57,8 @@ entry: ; CHECK: buffer_load_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 64 offen glc define void @soffset_max_imm([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) #1 { main_body: - %tmp0 = getelementptr [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0 - %tmp1 = load <16 x i8> addrspace(2)* %tmp0 + %tmp0 = getelementptr [6 x <16 x i8>], [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0 + %tmp1 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp0 %tmp2 = shl i32 %6, 2 %tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 64, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0) %tmp4 = add i32 %6, 16 @@ -76,8 +76,8 @@ main_body: ; CHECK: buffer_load_dword v{{[0-9+]}}, v{{[0-9+]}}, s[{{[0-9]+}}:{{[0-9]+}}], [[SOFFSET]] offen glc define void @soffset_no_fold([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) #1 { main_body: - %tmp0 = getelementptr [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0 - %tmp1 = load <16 x i8> addrspace(2)* %tmp0 + %tmp0 = getelementptr [6 x <16 x i8>], [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0 + %tmp1 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp0 %tmp2 = shl i32 %6, 2 %tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 65, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0) %tmp4 = add i32 %6, 16 @@ -95,7 +95,7 @@ main_body: ; CHECK: buffer_store_dword v{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0 offset:4 ; encoding: [0x04,0x00,0x70,0xe0 define void @mubuf_store0(i32 addrspace(1)* %out) { entry: - %0 = getelementptr i32 addrspace(1)* %out, i64 1 + %0 = getelementptr i32, i32 addrspace(1)* %out, i64 1 store i32 0, i32 addrspace(1)* %0 ret void } @@ -106,7 +106,7 @@ entry: define void @mubuf_store1(i8 addrspace(1)* %out) { entry: - %0 = getelementptr i8 addrspace(1)* %out, i64 4095 + %0 = getelementptr i8, i8 addrspace(1)* %out, i64 4095 store i8 0, i8 addrspace(1)* %0 ret void } @@ -117,7 +117,7 @@ entry: ; CHECK: buffer_store_dword v{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[SOFFSET]] ; encoding: [0x00,0x00,0x70,0xe0 define void @mubuf_store2(i32 addrspace(1)* %out) { entry: - %0 = getelementptr i32 addrspace(1)* %out, i64 1024 + %0 = getelementptr i32, i32 addrspace(1)* %out, i64 1024 store i32 0, i32 addrspace(1)* %0 ret void } @@ -128,8 +128,8 @@ entry: ; CHECK: buffer_store_dword v{{[0-9]}}, v[{{[0-9]:[0-9]}}], s[{{[0-9]:[0-9]}}], 0 addr64 offset:4 ; encoding: [0x04,0x80,0x70,0xe0 define void @mubuf_store3(i32 addrspace(1)* %out, i64 %offset) { entry: - %0 = getelementptr i32 addrspace(1)* %out, i64 %offset - %1 = getelementptr i32 addrspace(1)* %0, i64 1 + %0 = getelementptr i32, i32 addrspace(1)* %out, i64 %offset + %1 = getelementptr i32, i32 addrspace(1)* %0, i64 1 store i32 0, i32 addrspace(1)* %1 ret void } @@ -144,7 +144,7 @@ define void @store_sgpr_ptr(i32 addrspace(1)* %out) #0 { ; CHECK-LABEL: {{^}}store_sgpr_ptr_offset: ; CHECK: buffer_store_dword v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:40 define void @store_sgpr_ptr_offset(i32 addrspace(1)* %out) #0 { - %out.gep = getelementptr i32 addrspace(1)* %out, i32 10 + %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 10 store i32 99, i32 addrspace(1)* %out.gep, align 4 ret void } @@ -153,7 +153,7 @@ define void @store_sgpr_ptr_offset(i32 addrspace(1)* %out) #0 { ; CHECK: s_mov_b32 [[SOFFSET:s[0-9]+]], 0x20000 ; CHECK: buffer_store_dword v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, [[SOFFSET]] define void @store_sgpr_ptr_large_offset(i32 addrspace(1)* %out) #0 { - %out.gep = getelementptr i32 addrspace(1)* %out, i32 32768 + %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 32768 store i32 99, i32 addrspace(1)* %out.gep, align 4 ret void } @@ -162,7 +162,7 @@ define void @store_sgpr_ptr_large_offset(i32 addrspace(1)* %out) #0 { ; CHECK: s_mov_b32 [[SOFFSET:s[0-9]+]], 0x20000 ; CHECK: buffer_atomic_add v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, [[SOFFSET]] define void @store_sgpr_ptr_large_offset_atomic(i32 addrspace(1)* %out) #0 { - %gep = getelementptr i32 addrspace(1)* %out, i32 32768 + %gep = getelementptr i32, i32 addrspace(1)* %out, i32 32768 %val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 5 seq_cst ret void } @@ -171,7 +171,7 @@ define void @store_sgpr_ptr_large_offset_atomic(i32 addrspace(1)* %out) #0 { ; CHECK: buffer_store_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 define void @store_vgpr_ptr(i32 addrspace(1)* %out) #0 { %tid = call i32 @llvm.r600.read.tidig.x() readnone - %out.gep = getelementptr i32 addrspace(1)* %out, i32 %tid + %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid store i32 99, i32 addrspace(1)* %out.gep, align 4 ret void } |