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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/R600/rotr.ll | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/R600/rotr.ll')
| -rw-r--r-- | test/CodeGen/R600/rotr.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/test/CodeGen/R600/rotr.ll b/test/CodeGen/R600/rotr.ll index a5a4da4..a1add11 100644 --- a/test/CodeGen/R600/rotr.ll +++ b/test/CodeGen/R600/rotr.ll @@ -1,10 +1,10 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s -; FUNC-LABEL: @rotr_i32: +; FUNC-LABEL: {{^}}rotr_i32: ; R600: BIT_ALIGN_INT -; SI: V_ALIGNBIT_B32 +; SI: v_alignbit_b32 define void @rotr_i32(i32 addrspace(1)* %in, i32 %x, i32 %y) { entry: %tmp0 = sub i32 32, %y @@ -15,12 +15,12 @@ entry: ret void } -; FUNC-LABEL: @rotr_v2i32: +; FUNC-LABEL: {{^}}rotr_v2i32: ; R600: BIT_ALIGN_INT ; R600: BIT_ALIGN_INT -; SI: V_ALIGNBIT_B32 -; SI: V_ALIGNBIT_B32 +; SI: v_alignbit_b32 +; SI: v_alignbit_b32 define void @rotr_v2i32(<2 x i32> addrspace(1)* %in, <2 x i32> %x, <2 x i32> %y) { entry: %tmp0 = sub <2 x i32> <i32 32, i32 32>, %y @@ -31,16 +31,16 @@ entry: ret void } -; FUNC-LABEL: @rotr_v4i32: +; FUNC-LABEL: {{^}}rotr_v4i32: ; R600: BIT_ALIGN_INT ; R600: BIT_ALIGN_INT ; R600: BIT_ALIGN_INT ; R600: BIT_ALIGN_INT -; SI: V_ALIGNBIT_B32 -; SI: V_ALIGNBIT_B32 -; SI: V_ALIGNBIT_B32 -; SI: V_ALIGNBIT_B32 +; SI: v_alignbit_b32 +; SI: v_alignbit_b32 +; SI: v_alignbit_b32 +; SI: v_alignbit_b32 define void @rotr_v4i32(<4 x i32> addrspace(1)* %in, <4 x i32> %x, <4 x i32> %y) { entry: %tmp0 = sub <4 x i32> <i32 32, i32 32, i32 32, i32 32>, %y |