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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/CodeGen/R600/set-dx10.ll | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/CodeGen/R600/set-dx10.ll')
| -rw-r--r-- | test/CodeGen/R600/set-dx10.ll | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/test/CodeGen/R600/set-dx10.ll b/test/CodeGen/R600/set-dx10.ll index 5c7d499..53694dc 100644 --- a/test/CodeGen/R600/set-dx10.ll +++ b/test/CodeGen/R600/set-dx10.ll @@ -4,7 +4,7 @@ ; to store integer true (-1) and false (0) values are lowered to one of the ; SET*DX10 instructions. -; CHECK: @fcmp_une_select_fptosi +; CHECK: {{^}}fcmp_une_select_fptosi: ; CHECK: SETNE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -18,7 +18,7 @@ entry: ret void } -; CHECK: @fcmp_une_select_i32 +; CHECK: {{^}}fcmp_une_select_i32: ; CHECK: SETNE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -30,7 +30,7 @@ entry: ret void } -; CHECK: @fcmp_oeq_select_fptosi +; CHECK: {{^}}fcmp_oeq_select_fptosi: ; CHECK: SETE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -44,7 +44,7 @@ entry: ret void } -; CHECK: @fcmp_oeq_select_i32 +; CHECK: {{^}}fcmp_oeq_select_i32: ; CHECK: SETE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -56,7 +56,7 @@ entry: ret void } -; CHECK: @fcmp_ogt_select_fptosi +; CHECK: {{^}}fcmp_ogt_select_fptosi: ; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -70,7 +70,7 @@ entry: ret void } -; CHECK: @fcmp_ogt_select_i32 +; CHECK: {{^}}fcmp_ogt_select_i32: ; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -82,7 +82,7 @@ entry: ret void } -; CHECK: @fcmp_oge_select_fptosi +; CHECK: {{^}}fcmp_oge_select_fptosi: ; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -96,7 +96,7 @@ entry: ret void } -; CHECK: @fcmp_oge_select_i32 +; CHECK: {{^}}fcmp_oge_select_i32: ; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -108,7 +108,7 @@ entry: ret void } -; CHECK: @fcmp_ole_select_fptosi +; CHECK: {{^}}fcmp_ole_select_fptosi: ; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -122,7 +122,7 @@ entry: ret void } -; CHECK: @fcmp_ole_select_i32 +; CHECK: {{^}}fcmp_ole_select_i32: ; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -134,7 +134,7 @@ entry: ret void } -; CHECK: @fcmp_olt_select_fptosi +; CHECK: {{^}}fcmp_olt_select_fptosi: ; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) @@ -148,7 +148,7 @@ entry: ret void } -; CHECK: @fcmp_olt_select_i32 +; CHECK: {{^}}fcmp_olt_select_i32: ; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z, ; CHECK-NEXT: LSHR ; CHECK-NEXT: 1084227584(5.000000e+00) |