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authorTom Stellard <thomas.stellard@amd.com>2013-07-15 19:00:09 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-07-15 19:00:09 +0000
commitcd0f2458641ebebdb887da0381bd3acea6a1902f (patch)
treef6834ebd5203f475f827b41c256a3b885451ebcb /test/CodeGen/R600/sra.ll
parentd1654a769c06d20595398565de055b5ab3ede1f9 (diff)
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R600/SI: Add support for 64-bit loads
https://bugs.freedesktop.org/show_bug.cgi?id=65873 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186339 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/sra.ll')
-rw-r--r--test/CodeGen/R600/sra.ll14
1 files changed, 14 insertions, 0 deletions
diff --git a/test/CodeGen/R600/sra.ll b/test/CodeGen/R600/sra.ll
index 7c5cc75..5220a96 100644
--- a/test/CodeGen/R600/sra.ll
+++ b/test/CodeGen/R600/sra.ll
@@ -38,3 +38,17 @@ define void @ashr_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %i
store <4 x i32> %result, <4 x i32> addrspace(1)* %out
ret void
}
+
+;EG-CHECK: @ashr_i64
+;EG-CHECK: ASHR
+
+;SI-CHECK: @ashr_i64
+;SI-CHECK: V_ASHR_I64
+define void @ashr_i64(i64 addrspace(1)* %out, i32 %in) {
+entry:
+ %0 = sext i32 %in to i64
+ %1 = ashr i64 %0, 8
+ store i64 %1, i64 addrspace(1)* %out
+ ret void
+}
+