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author | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
commit | dce4a407a24b04eebc6a376f8e62b41aaa7b071f (patch) | |
tree | dcebc53f2b182f145a2e659393bf9a0472cedf23 /test/CodeGen/R600/store.ll | |
parent | 220b921aed042f9e520c26cffd8282a94c66c3d5 (diff) | |
download | external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.zip external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.gz external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.bz2 |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
Diffstat (limited to 'test/CodeGen/R600/store.ll')
-rw-r--r-- | test/CodeGen/R600/store.ll | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/test/CodeGen/R600/store.ll b/test/CodeGen/R600/store.ll index a3c5331..c0c8ccc 100644 --- a/test/CodeGen/R600/store.ll +++ b/test/CodeGen/R600/store.ll @@ -177,6 +177,26 @@ entry: ret void } +; FUNC-LABEL: @store_i64_i8 +; EG-CHECK: MEM_RAT MSKOR +; SI-CHECK: BUFFER_STORE_BYTE +define void @store_i64_i8(i8 addrspace(1)* %out, i64 %in) { +entry: + %0 = trunc i64 %in to i8 + store i8 %0, i8 addrspace(1)* %out + ret void +} + +; FUNC-LABEL: @store_i64_i16 +; EG-CHECK: MEM_RAT MSKOR +; SI-CHECK: BUFFER_STORE_SHORT +define void @store_i64_i16(i16 addrspace(1)* %out, i64 %in) { +entry: + %0 = trunc i64 %in to i16 + store i16 %0, i16 addrspace(1)* %out + ret void +} + ;===------------------------------------------------------------------------===; ; Local Address Space ;===------------------------------------------------------------------------===; @@ -272,6 +292,26 @@ entry: ret void } +; FUNC-LABEL: @store_local_i64_i8 +; EG-CHECK: LDS_BYTE_WRITE +; SI-CHECK: DS_WRITE_B8 +define void @store_local_i64_i8(i8 addrspace(3)* %out, i64 %in) { +entry: + %0 = trunc i64 %in to i8 + store i8 %0, i8 addrspace(3)* %out + ret void +} + +; FUNC-LABEL: @store_local_i64_i16 +; EG-CHECK: LDS_SHORT_WRITE +; SI-CHECK: DS_WRITE_B16 +define void @store_local_i64_i16(i16 addrspace(3)* %out, i64 %in) { +entry: + %0 = trunc i64 %in to i16 + store i16 %0, i16 addrspace(3)* %out + ret void +} + ; The stores in this function are combined by the optimizer to create a ; 64-bit store with 32-bit alignment. This is legal for SI and the legalizer ; should not try to split the 64-bit store back into 2 32-bit stores. @@ -297,3 +337,29 @@ entry: } attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +; When i128 was a legal type this program generated cannot select errors: + +; FUNC-LABEL: @i128-const-store +; FIXME: We should be able to to this with one store instruction +; EG-CHECK: STORE_RAW +; EG-CHECK: STORE_RAW +; EG-CHECK: STORE_RAW +; EG-CHECK: STORE_RAW +; CM-CHECK: STORE_DWORD +; CM-CHECK: STORE_DWORD +; CM-CHECK: STORE_DWORD +; CM-CHECK: STORE_DWORD +; SI: BUFFER_STORE_DWORDX2 +; SI: BUFFER_STORE_DWORDX2 +define void @i128-const-store(i32 addrspace(1)* %out) { +entry: + store i32 1, i32 addrspace(1)* %out, align 4 + %arrayidx2 = getelementptr inbounds i32 addrspace(1)* %out, i64 1 + store i32 1, i32 addrspace(1)* %arrayidx2, align 4 + %arrayidx4 = getelementptr inbounds i32 addrspace(1)* %out, i64 2 + store i32 2, i32 addrspace(1)* %arrayidx4, align 4 + %arrayidx6 = getelementptr inbounds i32 addrspace(1)* %out, i64 3 + store i32 2, i32 addrspace(1)* %arrayidx6, align 4 + ret void +} |