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| author | Vincent Lejeune <vljn@ovi.com> | 2013-06-07 23:30:26 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-06-07 23:30:26 +0000 |
| commit | b01bdf87ff5e13eb22fcc20cd395bf282fbf1ecd (patch) | |
| tree | 9c0c5c2ad59ac4cafa73e5d9552bffccde7b628f /test/CodeGen/R600/tex-clause-antidep.ll | |
| parent | ec2aaad01bff4ba2dd5cee0cd0bfe723db2619d0 (diff) | |
| download | external_llvm-b01bdf87ff5e13eb22fcc20cd395bf282fbf1ecd.zip external_llvm-b01bdf87ff5e13eb22fcc20cd395bf282fbf1ecd.tar.gz external_llvm-b01bdf87ff5e13eb22fcc20cd395bf282fbf1ecd.tar.bz2 | |
R600: Anti dep better handled in tex clause
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183592 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/tex-clause-antidep.ll')
| -rw-r--r-- | test/CodeGen/R600/tex-clause-antidep.ll | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/test/CodeGen/R600/tex-clause-antidep.ll b/test/CodeGen/R600/tex-clause-antidep.ll new file mode 100644 index 0000000..5979609 --- /dev/null +++ b/test/CodeGen/R600/tex-clause-antidep.ll @@ -0,0 +1,24 @@ +;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +;CHECK: TEX +;CHECK-NEXT: ALU + +define void @test() { + %1 = call float @llvm.R600.load.input(i32 0) + %2 = call float @llvm.R600.load.input(i32 1) + %3 = call float @llvm.R600.load.input(i32 2) + %4 = call float @llvm.R600.load.input(i32 3) + %5 = insertelement <4 x float> undef, float %1, i32 0 + %6 = insertelement <4 x float> %5, float %2, i32 1 + %7 = insertelement <4 x float> %6, float %3, i32 2 + %8 = insertelement <4 x float> %7, float %4, i32 3 + %9 = call <4 x float> @llvm.R600.tex(<4 x float> %8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) + %10 = call <4 x float> @llvm.R600.tex(<4 x float> %8, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) + %11 = fadd <4 x float> %9, %10 + call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0) + ret void +} + +declare float @llvm.R600.load.input(i32) readnone +declare <4 x float> @llvm.R600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readnone +declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) |