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| author | Michel Danzer <michel.daenzer@amd.com> | 2013-08-16 16:19:31 +0000 |
|---|---|---|
| committer | Michel Danzer <michel.daenzer@amd.com> | 2013-08-16 16:19:31 +0000 |
| commit | b89f197713737e8c93045eb4dbd9c1d7ab41acd4 (patch) | |
| tree | a9bf0f1346108939937ca7b5915349a802d27853 /test/CodeGen/R600/xor.ll | |
| parent | ebd4eec5386e946dc80f4d80e803125af55c2a68 (diff) | |
| download | external_llvm-b89f197713737e8c93045eb4dbd9c1d7ab41acd4.zip external_llvm-b89f197713737e8c93045eb4dbd9c1d7ab41acd4.tar.gz external_llvm-b89f197713737e8c93045eb4dbd9c1d7ab41acd4.tar.bz2 | |
R600/SI: Add pattern for xor of i1
Fixes two recent piglit regressions with radeonsi.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188559 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/xor.ll')
| -rw-r--r-- | test/CodeGen/R600/xor.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/test/CodeGen/R600/xor.ll b/test/CodeGen/R600/xor.ll index f52729d..84d4cd4 100644 --- a/test/CodeGen/R600/xor.ll +++ b/test/CodeGen/R600/xor.ll @@ -37,3 +37,20 @@ define void @xor_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in store <4 x i32> %result, <4 x i32> addrspace(1)* %out ret void } + +;EG-CHECK: @xor_i1 +;EG-CHECK: XOR_INT {{\*? *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], PV\.[XYZW]}} + +;SI-CHECK: @xor_i1 +;SI-CHECK: S_XOR_B64 {{SGPR[0-9]+_SGPR[0-9]+, SGPR[0-9]+_SGPR[0-9]+, SGPR[0-9]+_SGPR[0-9]+}} + +define void @xor_i1(float addrspace(1)* %out, float addrspace(1)* %in0, float addrspace(1)* %in1) { + %a = load float addrspace(1) * %in0 + %b = load float addrspace(1) * %in1 + %acmp = fcmp oge float %a, 0.000000e+00 + %bcmp = fcmp oge float %b, 0.000000e+00 + %xor = xor i1 %acmp, %bcmp + %result = select i1 %xor, float %a, float %b + store float %result, float addrspace(1)* %out + ret void +} |