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| author | Stephen Hines <srhines@google.com> | 2015-04-01 18:49:24 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-01 18:49:26 +0000 |
| commit | 3fa16bd6062e23bcdb82ed4dd965674792e6b761 (patch) | |
| tree | 9348fc507292f7e8715d22d64ce5a32131b4f875 /test/CodeGen/R600/zero_extend.ll | |
| parent | beed47390a60f6f0c77532b3d3f76bb47ef49423 (diff) | |
| parent | ebe69fe11e48d322045d5949c83283927a0d790b (diff) | |
| download | external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.zip external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.gz external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.bz2 | |
Merge "Update aosp/master LLVM for rebase to r230699."
Diffstat (limited to 'test/CodeGen/R600/zero_extend.ll')
| -rw-r--r-- | test/CodeGen/R600/zero_extend.ll | 31 |
1 files changed, 16 insertions, 15 deletions
diff --git a/test/CodeGen/R600/zero_extend.ll b/test/CodeGen/R600/zero_extend.ll index 0fe1f15..033055d 100644 --- a/test/CodeGen/R600/zero_extend.ll +++ b/test/CodeGen/R600/zero_extend.ll @@ -1,14 +1,15 @@ -; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK -; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600 +; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI -; R600-CHECK: {{^}}test: -; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW -; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW +; R600: {{^}}test: +; R600: MEM_RAT_CACHELESS STORE_RAW +; R600: MEM_RAT_CACHELESS STORE_RAW -; SI-CHECK: {{^}}test: -; SI-CHECK: s_mov_b32 [[ZERO:s[0-9]]], 0{{$}} -; SI-CHECK: v_mov_b32_e32 v[[V_ZERO:[0-9]]], [[ZERO]] -; SI-CHECK: buffer_store_dwordx2 v[0:[[V_ZERO]]{{\]}} +; SI: {{^}}test: +; SI: s_mov_b32 [[ZERO:s[0-9]]], 0{{$}} +; SI: v_mov_b32_e32 v[[V_ZERO:[0-9]]], [[ZERO]] +; SI: buffer_store_dwordx2 v[0:[[V_ZERO]]{{\]}} define void @test(i64 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) { entry: %0 = mul i32 %a, %b @@ -18,8 +19,8 @@ entry: ret void } -; SI-CHECK-LABEL: {{^}}testi1toi32: -; SI-CHECK: v_cndmask_b32 +; SI-LABEL: {{^}}testi1toi32: +; SI: v_cndmask_b32 define void @testi1toi32(i32 addrspace(1)* %out, i32 %a, i32 %b) { entry: %0 = icmp eq i32 %a, %b @@ -28,10 +29,10 @@ entry: ret void } -; SI-CHECK-LABEL: {{^}}zext_i1_to_i64: -; SI-CHECK: v_cmp_eq_i32 -; SI-CHECK: v_cndmask_b32 -; SI-CHECK: s_mov_b32 s{{[0-9]+}}, 0 +; SI-LABEL: {{^}}zext_i1_to_i64: +; SI: s_mov_b32 s{{[0-9]+}}, 0 +; SI: v_cmp_eq_i32 +; SI: v_cndmask_b32 define void @zext_i1_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) nounwind { %cmp = icmp eq i32 %a, %b %ext = zext i1 %cmp to i64 |