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author | Tom Stellard <thomas.stellard@amd.com> | 2013-10-22 18:19:10 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-10-22 18:19:10 +0000 |
commit | 04c559569f87d755c3f2828a765f5eb7308e6753 (patch) | |
tree | e9d7c6b9c64b995fcca4ed4e6362d93f84854db9 /test/CodeGen/R600 | |
parent | 34adeaf8b9e82e68d1dc8de916a307143ddd290c (diff) | |
download | external_llvm-04c559569f87d755c3f2828a765f5eb7308e6753.zip external_llvm-04c559569f87d755c3f2828a765f5eb7308e6753.tar.gz external_llvm-04c559569f87d755c3f2828a765f5eb7308e6753.tar.bz2 |
R600: Simplify handling of private address space
The AMDGPUIndirectAddressing pass was previously responsible for
lowering private loads and stores to indirect addressing instructions.
However, this pass was buggy and way too complicated. The only
advantage it had over the new simplified code was that it saved one
instruction per direct write to private memory. This optimization
likely has a minimal impact on performance, and we may be able
to duplicate it using some other transformation.
For the private address space, we now:
1. Lower private loads/store to Register(Load|Store) instructions
2. Reserve part of the register file as 'private memory'
3. After regalloc lower the Register(Load|Store) instructions to
MOV instructions that use indirect addressing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193179 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600')
-rw-r--r-- | test/CodeGen/R600/indirect-addressing.ll | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/test/CodeGen/R600/indirect-addressing.ll b/test/CodeGen/R600/indirect-addressing.ll index bd72cd9..1ef6c35 100644 --- a/test/CodeGen/R600/indirect-addressing.ll +++ b/test/CodeGen/R600/indirect-addressing.ll @@ -63,3 +63,42 @@ entry: store i32 %0, i32 addrspace(1)* %out ret void } + +; Test direct access of a private array inside a loop. The private array +; loads and stores should be lowered to copies, so there shouldn't be any +; MOVA instructions. + +; CHECK: @direct_loop +; CHECK-NOT: MOVA_INT + +define void @direct_loop(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { +entry: + %prv_array_const = alloca [2 x i32] + %prv_array = alloca [2 x i32] + %a = load i32 addrspace(1)* %in + %b_src_ptr = getelementptr i32 addrspace(1)* %in, i32 1 + %b = load i32 addrspace(1)* %b_src_ptr + %a_dst_ptr = getelementptr [2 x i32]* %prv_array_const, i32 0, i32 0 + store i32 %a, i32* %a_dst_ptr + %b_dst_ptr = getelementptr [2 x i32]* %prv_array_const, i32 0, i32 1 + store i32 %b, i32* %b_dst_ptr + br label %for.body + +for.body: + %inc = phi i32 [0, %entry], [%count, %for.body] + %x_ptr = getelementptr [2 x i32]* %prv_array_const, i32 0, i32 0 + %x = load i32* %x_ptr + %y_ptr = getelementptr [2 x i32]* %prv_array, i32 0, i32 0 + %y = load i32* %y_ptr + %xy = add i32 %x, %y + store i32 %xy, i32* %y_ptr + %count = add i32 %inc, 1 + %done = icmp eq i32 %count, 4095 + br i1 %done, label %for.end, label %for.body + +for.end: + %value_ptr = getelementptr [2 x i32]* %prv_array, i32 0, i32 0 + %value = load i32* %value_ptr + store i32 %value, i32 addrspace(1)* %out + ret void +} |