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authorTom Stellard <thomas.stellard@amd.com>2013-08-14 23:24:37 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-08-14 23:24:37 +0000
commit34f505e227b785e7ac935a7fa8b47062a6cbb3c6 (patch)
tree8d70bba2b0009a74de46c714ba5a5b0ec30e6322 /test/CodeGen/R600
parent38d5e1c36d954f1ff6489f58efd1d4865217cf9b (diff)
downloadexternal_llvm-34f505e227b785e7ac935a7fa8b47062a6cbb3c6.zip
external_llvm-34f505e227b785e7ac935a7fa8b47062a6cbb3c6.tar.gz
external_llvm-34f505e227b785e7ac935a7fa8b47062a6cbb3c6.tar.bz2
R600/SI: Use i8 types for resource descriptors in tests
We switched from i32 to i8 types a while ago and the tests were never updated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188428 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600')
-rw-r--r--test/CodeGen/R600/llvm.SI.imageload.ll22
-rw-r--r--test/CodeGen/R600/llvm.SI.resinfo.ll34
-rw-r--r--test/CodeGen/R600/llvm.SI.sample.ll34
-rw-r--r--test/CodeGen/R600/llvm.SI.sampled.ll34
4 files changed, 62 insertions, 62 deletions
diff --git a/test/CodeGen/R600/llvm.SI.imageload.ll b/test/CodeGen/R600/llvm.SI.imageload.ll
index 3817034..dc3a3ac 100644
--- a/test/CodeGen/R600/llvm.SI.imageload.ll
+++ b/test/CodeGen/R600/llvm.SI.imageload.ll
@@ -23,25 +23,25 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
%v15 = insertelement <4 x i32> undef, i32 %a4, i32 2
%v16 = insertelement <4 x i32> undef, i32 %a4, i32 3
%res1 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v1,
- <8 x i32> undef, i32 1)
+ <32 x i8> undef, i32 1)
%res2 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v2,
- <8 x i32> undef, i32 2)
+ <32 x i8> undef, i32 2)
%res3 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v3,
- <8 x i32> undef, i32 3)
+ <32 x i8> undef, i32 3)
%res4 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v4,
- <8 x i32> undef, i32 4)
+ <32 x i8> undef, i32 4)
%res5 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v5,
- <8 x i32> undef, i32 5)
+ <32 x i8> undef, i32 5)
%res6 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v6,
- <8 x i32> undef, i32 6)
+ <32 x i8> undef, i32 6)
%res10 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v10,
- <8 x i32> undef, i32 10)
+ <32 x i8> undef, i32 10)
%res11 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v11,
- <8 x i32> undef, i32 11)
+ <32 x i8> undef, i32 11)
%res15 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v15,
- <8 x i32> undef, i32 15)
+ <32 x i8> undef, i32 15)
%res16 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v16,
- <8 x i32> undef, i32 16)
+ <32 x i8> undef, i32 16)
%e1 = extractelement <4 x i32> %res1, i32 0
%e2 = extractelement <4 x i32> %res2, i32 1
%e3 = extractelement <4 x i32> %res3, i32 2
@@ -117,7 +117,7 @@ main_body:
ret void
}
-declare <4 x i32> @llvm.SI.imageload.(<4 x i32>, <8 x i32>, i32) readnone
+declare <4 x i32> @llvm.SI.imageload.(<4 x i32>, <32 x i8>, i32) readnone
; Function Attrs: nounwind readnone
declare <4 x i32> @llvm.SI.imageload.v4i32(<4 x i32>, <32 x i8>, i32) #1
diff --git a/test/CodeGen/R600/llvm.SI.resinfo.ll b/test/CodeGen/R600/llvm.SI.resinfo.ll
index eb31514..9b8d161 100644
--- a/test/CodeGen/R600/llvm.SI.resinfo.ll
+++ b/test/CodeGen/R600/llvm.SI.resinfo.ll
@@ -19,22 +19,22 @@
define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8,
i32 %a9, i32 %a10, i32 %a11, i32 %a12, i32 %a13, i32 %a14, i32 %a15, i32 %a16) {
- %res1 = call <4 x i32> @llvm.SI.resinfo(i32 %a1, <8 x i32> undef, i32 1)
- %res2 = call <4 x i32> @llvm.SI.resinfo(i32 %a2, <8 x i32> undef, i32 2)
- %res3 = call <4 x i32> @llvm.SI.resinfo(i32 %a3, <8 x i32> undef, i32 3)
- %res4 = call <4 x i32> @llvm.SI.resinfo(i32 %a4, <8 x i32> undef, i32 4)
- %res5 = call <4 x i32> @llvm.SI.resinfo(i32 %a5, <8 x i32> undef, i32 5)
- %res6 = call <4 x i32> @llvm.SI.resinfo(i32 %a6, <8 x i32> undef, i32 6)
- %res7 = call <4 x i32> @llvm.SI.resinfo(i32 %a7, <8 x i32> undef, i32 7)
- %res8 = call <4 x i32> @llvm.SI.resinfo(i32 %a8, <8 x i32> undef, i32 8)
- %res9 = call <4 x i32> @llvm.SI.resinfo(i32 %a9, <8 x i32> undef, i32 9)
- %res10 = call <4 x i32> @llvm.SI.resinfo(i32 %a10, <8 x i32> undef, i32 10)
- %res11 = call <4 x i32> @llvm.SI.resinfo(i32 %a11, <8 x i32> undef, i32 11)
- %res12 = call <4 x i32> @llvm.SI.resinfo(i32 %a12, <8 x i32> undef, i32 12)
- %res13 = call <4 x i32> @llvm.SI.resinfo(i32 %a13, <8 x i32> undef, i32 13)
- %res14 = call <4 x i32> @llvm.SI.resinfo(i32 %a14, <8 x i32> undef, i32 14)
- %res15 = call <4 x i32> @llvm.SI.resinfo(i32 %a15, <8 x i32> undef, i32 15)
- %res16 = call <4 x i32> @llvm.SI.resinfo(i32 %a16, <8 x i32> undef, i32 16)
+ %res1 = call <4 x i32> @llvm.SI.resinfo(i32 %a1, <32 x i8> undef, i32 1)
+ %res2 = call <4 x i32> @llvm.SI.resinfo(i32 %a2, <32 x i8> undef, i32 2)
+ %res3 = call <4 x i32> @llvm.SI.resinfo(i32 %a3, <32 x i8> undef, i32 3)
+ %res4 = call <4 x i32> @llvm.SI.resinfo(i32 %a4, <32 x i8> undef, i32 4)
+ %res5 = call <4 x i32> @llvm.SI.resinfo(i32 %a5, <32 x i8> undef, i32 5)
+ %res6 = call <4 x i32> @llvm.SI.resinfo(i32 %a6, <32 x i8> undef, i32 6)
+ %res7 = call <4 x i32> @llvm.SI.resinfo(i32 %a7, <32 x i8> undef, i32 7)
+ %res8 = call <4 x i32> @llvm.SI.resinfo(i32 %a8, <32 x i8> undef, i32 8)
+ %res9 = call <4 x i32> @llvm.SI.resinfo(i32 %a9, <32 x i8> undef, i32 9)
+ %res10 = call <4 x i32> @llvm.SI.resinfo(i32 %a10, <32 x i8> undef, i32 10)
+ %res11 = call <4 x i32> @llvm.SI.resinfo(i32 %a11, <32 x i8> undef, i32 11)
+ %res12 = call <4 x i32> @llvm.SI.resinfo(i32 %a12, <32 x i8> undef, i32 12)
+ %res13 = call <4 x i32> @llvm.SI.resinfo(i32 %a13, <32 x i8> undef, i32 13)
+ %res14 = call <4 x i32> @llvm.SI.resinfo(i32 %a14, <32 x i8> undef, i32 14)
+ %res15 = call <4 x i32> @llvm.SI.resinfo(i32 %a15, <32 x i8> undef, i32 15)
+ %res16 = call <4 x i32> @llvm.SI.resinfo(i32 %a16, <32 x i8> undef, i32 16)
%e1 = extractelement <4 x i32> %res1, i32 0
%e2 = extractelement <4 x i32> %res2, i32 1
%e3 = extractelement <4 x i32> %res3, i32 2
@@ -105,6 +105,6 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7,
ret void
}
-declare <4 x i32> @llvm.SI.resinfo(i32, <8 x i32>, i32) readnone
+declare <4 x i32> @llvm.SI.resinfo(i32, <32 x i8>, i32) readnone
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
diff --git a/test/CodeGen/R600/llvm.SI.sample.ll b/test/CodeGen/R600/llvm.SI.sample.ll
index 7655996..dc2948a 100644
--- a/test/CodeGen/R600/llvm.SI.sample.ll
+++ b/test/CodeGen/R600/llvm.SI.sample.ll
@@ -35,37 +35,37 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
%v15 = insertelement <4 x i32> undef, i32 %a4, i32 2
%v16 = insertelement <4 x i32> undef, i32 %a4, i32 3
%res1 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v1,
- <8 x i32> undef, <4 x i32> undef, i32 1)
+ <32 x i8> undef, <4 x i32> undef, i32 1)
%res2 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v2,
- <8 x i32> undef, <4 x i32> undef, i32 2)
+ <32 x i8> undef, <4 x i32> undef, i32 2)
%res3 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v3,
- <8 x i32> undef, <4 x i32> undef, i32 3)
+ <32 x i8> undef, <4 x i32> undef, i32 3)
%res4 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v4,
- <8 x i32> undef, <4 x i32> undef, i32 4)
+ <32 x i8> undef, <4 x i32> undef, i32 4)
%res5 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v5,
- <8 x i32> undef, <4 x i32> undef, i32 5)
+ <32 x i8> undef, <4 x i32> undef, i32 5)
%res6 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v6,
- <8 x i32> undef, <4 x i32> undef, i32 6)
+ <32 x i8> undef, <4 x i32> undef, i32 6)
%res7 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v7,
- <8 x i32> undef, <4 x i32> undef, i32 7)
+ <32 x i8> undef, <4 x i32> undef, i32 7)
%res8 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v8,
- <8 x i32> undef, <4 x i32> undef, i32 8)
+ <32 x i8> undef, <4 x i32> undef, i32 8)
%res9 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v9,
- <8 x i32> undef, <4 x i32> undef, i32 9)
+ <32 x i8> undef, <4 x i32> undef, i32 9)
%res10 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v10,
- <8 x i32> undef, <4 x i32> undef, i32 10)
+ <32 x i8> undef, <4 x i32> undef, i32 10)
%res11 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v11,
- <8 x i32> undef, <4 x i32> undef, i32 11)
+ <32 x i8> undef, <4 x i32> undef, i32 11)
%res12 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v12,
- <8 x i32> undef, <4 x i32> undef, i32 12)
+ <32 x i8> undef, <4 x i32> undef, i32 12)
%res13 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v13,
- <8 x i32> undef, <4 x i32> undef, i32 13)
+ <32 x i8> undef, <4 x i32> undef, i32 13)
%res14 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v14,
- <8 x i32> undef, <4 x i32> undef, i32 14)
+ <32 x i8> undef, <4 x i32> undef, i32 14)
%res15 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v15,
- <8 x i32> undef, <4 x i32> undef, i32 15)
+ <32 x i8> undef, <4 x i32> undef, i32 15)
%res16 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v16,
- <8 x i32> undef, <4 x i32> undef, i32 16)
+ <32 x i8> undef, <4 x i32> undef, i32 16)
%e1 = extractelement <4 x float> %res1, i32 0
%e2 = extractelement <4 x float> %res2, i32 1
%e3 = extractelement <4 x float> %res3, i32 2
@@ -135,6 +135,6 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
ret void
}
-declare <4 x float> @llvm.SI.sample.(<4 x i32>, <8 x i32>, <4 x i32>, i32) readnone
+declare <4 x float> @llvm.SI.sample.(<4 x i32>, <32 x i8>, <4 x i32>, i32) readnone
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
diff --git a/test/CodeGen/R600/llvm.SI.sampled.ll b/test/CodeGen/R600/llvm.SI.sampled.ll
index 3b05551..56645de 100644
--- a/test/CodeGen/R600/llvm.SI.sampled.ll
+++ b/test/CodeGen/R600/llvm.SI.sampled.ll
@@ -35,37 +35,37 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
%v15 = insertelement <4 x i32> undef, i32 %a4, i32 2
%v16 = insertelement <4 x i32> undef, i32 %a4, i32 3
%res1 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v1,
- <8 x i32> undef, <4 x i32> undef, i32 1)
+ <32 x i8> undef, <4 x i32> undef, i32 1)
%res2 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v2,
- <8 x i32> undef, <4 x i32> undef, i32 2)
+ <32 x i8> undef, <4 x i32> undef, i32 2)
%res3 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v3,
- <8 x i32> undef, <4 x i32> undef, i32 3)
+ <32 x i8> undef, <4 x i32> undef, i32 3)
%res4 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v4,
- <8 x i32> undef, <4 x i32> undef, i32 4)
+ <32 x i8> undef, <4 x i32> undef, i32 4)
%res5 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v5,
- <8 x i32> undef, <4 x i32> undef, i32 5)
+ <32 x i8> undef, <4 x i32> undef, i32 5)
%res6 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v6,
- <8 x i32> undef, <4 x i32> undef, i32 6)
+ <32 x i8> undef, <4 x i32> undef, i32 6)
%res7 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v7,
- <8 x i32> undef, <4 x i32> undef, i32 7)
+ <32 x i8> undef, <4 x i32> undef, i32 7)
%res8 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v8,
- <8 x i32> undef, <4 x i32> undef, i32 8)
+ <32 x i8> undef, <4 x i32> undef, i32 8)
%res9 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v9,
- <8 x i32> undef, <4 x i32> undef, i32 9)
+ <32 x i8> undef, <4 x i32> undef, i32 9)
%res10 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v10,
- <8 x i32> undef, <4 x i32> undef, i32 10)
+ <32 x i8> undef, <4 x i32> undef, i32 10)
%res11 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v11,
- <8 x i32> undef, <4 x i32> undef, i32 11)
+ <32 x i8> undef, <4 x i32> undef, i32 11)
%res12 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v12,
- <8 x i32> undef, <4 x i32> undef, i32 12)
+ <32 x i8> undef, <4 x i32> undef, i32 12)
%res13 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v13,
- <8 x i32> undef, <4 x i32> undef, i32 13)
+ <32 x i8> undef, <4 x i32> undef, i32 13)
%res14 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v14,
- <8 x i32> undef, <4 x i32> undef, i32 14)
+ <32 x i8> undef, <4 x i32> undef, i32 14)
%res15 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v15,
- <8 x i32> undef, <4 x i32> undef, i32 15)
+ <32 x i8> undef, <4 x i32> undef, i32 15)
%res16 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v16,
- <8 x i32> undef, <4 x i32> undef, i32 16)
+ <32 x i8> undef, <4 x i32> undef, i32 16)
%e1 = extractelement <4 x float> %res1, i32 0
%e2 = extractelement <4 x float> %res2, i32 1
%e3 = extractelement <4 x float> %res3, i32 2
@@ -135,6 +135,6 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
ret void
}
-declare <4 x float> @llvm.SI.sampled.(<4 x i32>, <8 x i32>, <4 x i32>, i32) readnone
+declare <4 x float> @llvm.SI.sampled.(<4 x i32>, <32 x i8>, <4 x i32>, i32) readnone
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)