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authorVincent Lejeune <vljn@ovi.com>2013-10-13 17:56:28 +0000
committerVincent Lejeune <vljn@ovi.com>2013-10-13 17:56:28 +0000
commitcf1f4c7dd19458f47a9ba720d90eec507d66c94a (patch)
treedebf68a8932fae59f1a989b2cc637c074564c389 /test/CodeGen/R600
parent36d96337f7bf17a35c44403ca5df4023be7f0157 (diff)
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R600: improve dump of S_WAITCNT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192557 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600')
-rw-r--r--test/CodeGen/R600/wait.ll37
1 files changed, 37 insertions, 0 deletions
diff --git a/test/CodeGen/R600/wait.ll b/test/CodeGen/R600/wait.ll
new file mode 100644
index 0000000..2cf88fe
--- /dev/null
+++ b/test/CodeGen/R600/wait.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=r600 -mcpu=SI --verify-machineinstrs | FileCheck %s
+
+;CHECK-LABEL: @main
+;CHECK: S_WAITCNT lgkmcnt(0)
+;CHECK: S_WAITCNT vmcnt(0)
+;CHECK: S_WAITCNT expcnt(0) lgkmcnt(0)
+
+define void @main(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
+main_body:
+ %10 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
+ %11 = load <16 x i8> addrspace(2)* %10, !tbaa !0
+ %12 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %11, i32 0, i32 %6)
+ %13 = extractelement <4 x float> %12, i32 0
+ %14 = extractelement <4 x float> %12, i32 1
+ %15 = extractelement <4 x float> %12, i32 2
+ %16 = extractelement <4 x float> %12, i32 3
+ %17 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
+ %18 = load <16 x i8> addrspace(2)* %17, !tbaa !0
+ %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %6)
+ %20 = extractelement <4 x float> %19, i32 0
+ %21 = extractelement <4 x float> %19, i32 1
+ %22 = extractelement <4 x float> %19, i32 2
+ %23 = extractelement <4 x float> %19, i32 3
+ call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %20, float %21, float %22, float %23)
+ call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %13, float %14, float %15, float %16)
+ ret void
+}
+
+; Function Attrs: nounwind readnone
+declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
+
+declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
+
+attributes #0 = { "ShaderType"="1" }
+attributes #1 = { nounwind readnone }
+
+!0 = metadata !{metadata !"const", null, i32 1}