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author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2011-01-11 22:38:28 +0000 |
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committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2011-01-11 22:38:28 +0000 |
commit | f27df33b02a85a030aaa4476aee7d1e8fe5921b2 (patch) | |
tree | 4cbd6b94dc63077a1faf259b5a2cb500467d4755 /test/CodeGen/SPARC/2011-01-11-CC.ll | |
parent | d8c120bbd3ed19439c02ce629f312b163302b5dd (diff) | |
download | external_llvm-f27df33b02a85a030aaa4476aee7d1e8fe5921b2.zip external_llvm-f27df33b02a85a030aaa4476aee7d1e8fe5921b2.tar.gz external_llvm-f27df33b02a85a030aaa4476aee7d1e8fe5921b2.tar.bz2 |
SPARC backend: correct ICC/FCC uses for ADDX and SELECT_CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123281 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SPARC/2011-01-11-CC.ll')
-rwxr-xr-x | test/CodeGen/SPARC/2011-01-11-CC.ll | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/test/CodeGen/SPARC/2011-01-11-CC.ll b/test/CodeGen/SPARC/2011-01-11-CC.ll new file mode 100755 index 0000000..c9f7dda --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-11-CC.ll @@ -0,0 +1,76 @@ +; RUN: llc -march=sparc <%s | FileCheck %s + + +define i32 @test_addx(i64 %a, i64 %b, i64 %c) nounwind readnone noinline { +entry: +; CHECK: addcc +; CHECK-NOT: subcc +; CHECK: addx + %0 = add i64 %a, %b + %1 = icmp ugt i64 %0, %c + %2 = zext i1 %1 to i32 + ret i32 %2 +} + + +define i32 @test_select_int_icc(i32 %a, i32 %b, i32 %c) nounwind readnone noinline { +entry: +; CHECK: test_select_int_icc +; CHECK: subcc +; CHECK: be + %0 = icmp eq i32 %a, 0 + %1 = select i1 %0, i32 %b, i32 %c + ret i32 %1 +} + + +define float @test_select_fp_icc(i32 %a, float %f1, float %f2) nounwind readnone noinline { +entry: +; CHECK: test_select_fp_icc +; CHECK: subcc +; CHECK: be + %0 = icmp eq i32 %a, 0 + %1 = select i1 %0, float %f1, float %f2 + ret float %1 +} + +define double @test_select_dfp_icc(i32 %a, double %f1, double %f2) nounwind readnone noinline { +entry: +; CHECK: test_select_fp_icc +; CHECK: subcc +; CHECK: be + %0 = icmp eq i32 %a, 0 + %1 = select i1 %0, double %f1, double %f2 + ret double %1 +} + +define i32 @test_select_int_fcc(float %f, i32 %a, i32 %b) nounwind readnone noinline { +entry: +;CHECK: test_select_int_fcc +;CHECK: fcmps +;CHECK: fbne + %0 = fcmp une float %f, 0.000000e+00 + %a.b = select i1 %0, i32 %a, i32 %b + ret i32 %a.b +} + + +define float @test_select_fp_fcc(float %f, float %f1, float %f2) nounwind readnone noinline { +entry: +;CHECK: test_select_fp_fcc +;CHECK: fcmps +;CHECK: fbne + %0 = fcmp une float %f, 0.000000e+00 + %1 = select i1 %0, float %f1, float %f2 + ret float %1 +} + +define double @test_select_dfp_fcc(double %f, double %f1, double %f2) nounwind readnone noinline { +entry: +;CHECK: test_select_dfp_fcc +;CHECK: fcmpd +;CHECK: fbne + %0 = fcmp une double %f, 0.000000e+00 + %1 = select i1 %0, double %f1, double %f2 + ret double %1 +} |