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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-06 11:46:36 -0700 |
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committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-18 10:52:30 -0700 |
commit | 2c3e0051c31c3f5b2328b447eadf1cf9c4427442 (patch) | |
tree | c0104029af14e9f47c2ef58ca60e6137691f3c9b /test/CodeGen/SPARC | |
parent | e1bc145815f4334641be19f1c45ecf85d25b6e5a (diff) | |
download | external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.zip external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.tar.gz external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.tar.bz2 |
Update aosp/master LLVM for rebase to r235153
Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
(cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
Diffstat (limited to 'test/CodeGen/SPARC')
-rw-r--r-- | test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/SPARC/2011-01-11-Call.ll | 6 | ||||
-rw-r--r-- | test/CodeGen/SPARC/2011-01-19-DelaySlot.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/SPARC/64abi.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/SPARC/setjmp.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/SPARC/tls.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/SPARC/varargs.ll | 2 |
7 files changed, 9 insertions, 9 deletions
diff --git a/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll b/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll index c12e9c1..7975ee4 100644 --- a/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll +++ b/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll @@ -7,7 +7,7 @@ module asm "\09.section\09\22.dtors\22,#alloc,#write" define void @frame_dummy() nounwind { entry: - %asmtmp = tail call void (i8*)* (void (i8*)*)* asm "", "=r,0"(void (i8*)* @_Jv_RegisterClasses) nounwind ; <void (i8*)*> [#uses=0] + %asmtmp = tail call void (i8*)* (void (i8*)*) asm "", "=r,0"(void (i8*)* @_Jv_RegisterClasses) nounwind ; <void (i8*)*> [#uses=0] unreachable } diff --git a/test/CodeGen/SPARC/2011-01-11-Call.ll b/test/CodeGen/SPARC/2011-01-11-Call.ll index 067bade..8097e49 100644 --- a/test/CodeGen/SPARC/2011-01-11-Call.ll +++ b/test/CodeGen/SPARC/2011-01-11-Call.ll @@ -22,8 +22,8 @@ define void @test() nounwind { entry: - %0 = tail call i32 (...)* @foo() nounwind - tail call void (...)* @bar() nounwind + %0 = tail call i32 (...) @foo() nounwind + tail call void (...) @bar() nounwind ret void } @@ -48,6 +48,6 @@ declare void @bar(...) define i32 @test_tail_call_with_return() nounwind { entry: - %0 = tail call i32 (...)* @foo() nounwind + %0 = tail call i32 (...) @foo() nounwind ret i32 %0 } diff --git a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll index 8a3edc6..29bca67 100644 --- a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll +++ b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll @@ -66,7 +66,7 @@ entry: br i1 %0, label %bb, label %bb1 bb: ; preds = %entry - %1 = tail call i32 (...)* @foo(i32 %a) nounwind + %1 = tail call i32 (...) @foo(i32 %a) nounwind ret i32 %1 bb1: ; preds = %entry diff --git a/test/CodeGen/SPARC/64abi.ll b/test/CodeGen/SPARC/64abi.ll index a7e482c..7c08998 100644 --- a/test/CodeGen/SPARC/64abi.ll +++ b/test/CodeGen/SPARC/64abi.ll @@ -436,7 +436,7 @@ declare i64 @receive_fp128(i64 %a, ...) ; CHECK: call receive_fp128 define i64 @test_fp128_variable_args(i64 %a, fp128 %b) { entry: - %0 = call i64 (i64, ...)* @receive_fp128(i64 %a, fp128 %b) + %0 = call i64 (i64, ...) @receive_fp128(i64 %a, fp128 %b) ret i64 %0 } diff --git a/test/CodeGen/SPARC/setjmp.ll b/test/CodeGen/SPARC/setjmp.ll index e75ef96..17519c5 100644 --- a/test/CodeGen/SPARC/setjmp.ll +++ b/test/CodeGen/SPARC/setjmp.ll @@ -47,7 +47,7 @@ entry: bar.exit: ; preds = %entry %8 = load i32, i32* %0, align 4, !tbaa !4 - %9 = call i32 (i8*, ...)* @printf(i8* noalias getelementptr inbounds ([30 x i8], [30 x i8]* @.cst, i32 0, i32 0), i32 %8) #0 + %9 = call i32 (i8*, ...) @printf(i8* noalias getelementptr inbounds ([30 x i8], [30 x i8]* @.cst, i32 0, i32 0), i32 %8) #0 ret i32 0 } diff --git a/test/CodeGen/SPARC/tls.ll b/test/CodeGen/SPARC/tls.ll index d54cf60..a70637b 100644 --- a/test/CodeGen/SPARC/tls.ll +++ b/test/CodeGen/SPARC/tls.ll @@ -99,7 +99,7 @@ entry: ; v9abs-obj: ] ; pic-obj: Relocations [ -; pic-obj: Section (2) .rela.text { +; pic-obj: Section {{.*}} .rela.text { ; pic-obj: 0x{{[0-9,A-F]+}} R_SPARC_PC22 _GLOBAL_OFFSET_TABLE_ 0x4 ; pic-obj: 0x{{[0-9,A-F]+}} R_SPARC_PC10 _GLOBAL_OFFSET_TABLE_ 0x8 ; pic-obj: 0x{{[0-9,A-F]+}} R_SPARC_TLS_LDO_HIX22 local_symbol 0x0 diff --git a/test/CodeGen/SPARC/varargs.ll b/test/CodeGen/SPARC/varargs.ll index 9f18644..c2d1e98 100644 --- a/test/CodeGen/SPARC/varargs.ll +++ b/test/CodeGen/SPARC/varargs.ll @@ -71,6 +71,6 @@ declare void @llvm.va_start(i8*) ; CHECK: , %f2 define i32 @call_1d() #0 { entry: - %call = call double (i8*, double, ...)* @varargsfunc(i8* undef, double 1.000000e+00, double 2.000000e+00) + %call = call double (i8*, double, ...) @varargsfunc(i8* undef, double 1.000000e+00, double 2.000000e+00) ret i32 1 } |