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author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-05-06 16:17:29 +0000 |
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committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-05-06 16:17:29 +0000 |
commit | b503b49b5105b6aad7d2a015468b84b0f64dfe8e (patch) | |
tree | a60966043fae51838cb2faa08531a7ed078e4fb6 /test/CodeGen/SystemZ/asm-14.ll | |
parent | 1d09d56fe1e3f3faadd4bf4ccf3e585ddb3c3b07 (diff) | |
download | external_llvm-b503b49b5105b6aad7d2a015468b84b0f64dfe8e.zip external_llvm-b503b49b5105b6aad7d2a015468b84b0f64dfe8e.tar.gz external_llvm-b503b49b5105b6aad7d2a015468b84b0f64dfe8e.tar.bz2 |
[SystemZ] Add CodeGen test cases
This adds all CodeGen tests for the SystemZ target.
This version of the patch incorporates feedback from a review by
Sean Silva. Thanks to all reviewers!
Patch by Richard Sandiford.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ/asm-14.ll')
-rw-r--r-- | test/CodeGen/SystemZ/asm-14.ll | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/asm-14.ll b/test/CodeGen/SystemZ/asm-14.ll new file mode 100644 index 0000000..b6b28d6 --- /dev/null +++ b/test/CodeGen/SystemZ/asm-14.ll @@ -0,0 +1,41 @@ +; Test the "L" constraint (20-bit signed constants). +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s + +; Test 1 below the first valid value. +define i32 @f1() { +; CHECK: f1: +; CHECK: iilf [[REG:%r[0-5]]], 4294443007 +; CHECK: blah %r2 [[REG]] +; CHECK: br %r14 + %val = call i32 asm "blah $0 $1", "=&r,rL" (i32 -524289) + ret i32 %val +} + +; Test the first valid value. +define i32 @f2() { +; CHECK: f2: +; CHECK: blah %r2 -524288 +; CHECK: br %r14 + %val = call i32 asm "blah $0 $1", "=&r,rL" (i32 -524288) + ret i32 %val +} + +; Test the last valid value. +define i32 @f3() { +; CHECK: f3: +; CHECK: blah %r2 524287 +; CHECK: br %r14 + %val = call i32 asm "blah $0 $1", "=&r,rL" (i32 524287) + ret i32 %val +} + +; Test 1 above the last valid value. +define i32 @f4() { +; CHECK: f4: +; CHECK: llilh [[REG:%r[0-5]]], 8 +; CHECK: blah %r2 [[REG]] +; CHECK: br %r14 + %val = call i32 asm "blah $0 $1", "=&r,rL" (i32 524288) + ret i32 %val +} |